ef8655adc8
CUDA-12 no longer supports 32-bit compilation. Tests agnostic to 32/64 compilation mode are switched to use nvptx64. Tests that do care about it have 32-bit ptxas compilation disabled with cuda-12+. Differential Revision: https://reviews.llvm.org/D152199
27 lines
796 B
LLVM
27 lines
796 B
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
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; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
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; CHECK: .func ({{.*}}) device_func
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define float @device_func(float %a) noinline {
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%ret = fmul float %a, %a
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ret float %ret
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}
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; CHECK: .entry kernel_func
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define void @kernel_func(ptr %a) {
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%val = load float, ptr %a
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; CHECK: call.uni (retval0),
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; CHECK: device_func,
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%mul = call float @device_func(float %val)
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store float %mul, ptr %a
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ret void
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}
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!nvvm.annotations = !{!1}
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!1 = !{ptr @kernel_func, !"kernel", i32 1}
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