Files
clang-p2996/llvm/test/CodeGen/NVPTX/vector-stores.ll
Artem Belevich a2d3bb1fa9 Revert "[NVPTX] Lower 16xi8 and 8xi8 stores efficiently (#73646)" (#74518)
This reverts commit 173fcf7da5.

We need to constrain the optimization to properly aligned loads/stores
only.
https://github.com/llvm/llvm-project/pull/73646#issuecomment-1841454559
2023-12-06 10:48:43 -08:00

40 lines
913 B
LLVM

; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
; CHECK-LABEL: .visible .func foo1
; CHECK: st.v2.f32
define void @foo1(<2 x float> %val, ptr %ptr) {
store <2 x float> %val, ptr %ptr
ret void
}
; CHECK-LABEL: .visible .func foo2
; CHECK: st.v4.f32
define void @foo2(<4 x float> %val, ptr %ptr) {
store <4 x float> %val, ptr %ptr
ret void
}
; CHECK-LABEL: .visible .func foo3
; CHECK: st.v2.u32
define void @foo3(<2 x i32> %val, ptr %ptr) {
store <2 x i32> %val, ptr %ptr
ret void
}
; CHECK-LABEL: .visible .func foo4
; CHECK: st.v4.u32
define void @foo4(<4 x i32> %val, ptr %ptr) {
store <4 x i32> %val, ptr %ptr
ret void
}
; CHECK-LABEL: .visible .func v16i8
define void @v16i8(ptr %a, ptr %b) {
; CHECK: ld.v4.u32
; CHECK: st.v4.u32
%v = load <16 x i8>, ptr %a
store <16 x i8> %v, ptr %b
ret void
}