360996ac5a
Since #72467, `@plt` in assembly output "call foo@plt" is omitted. We can trivially merge MO_PLT and MO_CALL without any functional change to assembly/relocatable file output. Earlier architectures use different call relocation types whether a PLT is potentially needed: R_386_PLT32/R_386_PC32, R_68K_PLT32/R_68K_PC32, R_SPARC_WDISP30/R_SPARC_WPLT320. However, as the PLT property is per-symbol instead of per-call-site and linkers can optimize out a PLT, the distinction has been confusing. Arm made good names R_ARM_CALL/R_AARCH64_CALL. Let's use MO_CALL instead of MO_PLT. As follow-ups, we can merge fixup_riscv_call/fixup_riscv_call_plt and VK_RISCV_CALL/VK_RISCV_CALL_PLT.
55 lines
2.9 KiB
LLVM
55 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -mtriple=riscv32 -global-isel --stop-before=legalizer < %s -o - \
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; RUN: | FileCheck --check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv64 -global-isel --stop-before=legalizer < %s -o - \
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; RUN: | FileCheck --check-prefix=RV64I %s
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declare i32 @foo(i32 noundef signext, ...)
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define i32 @main() {
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; RV32I-LABEL: name: main
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; RV32I: bb.1.entry:
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; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; RV32I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; RV32I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; RV32I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
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; RV32I-NEXT: G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
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; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV32I-NEXT: $x10 = COPY [[C]](s32)
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; RV32I-NEXT: $x11 = COPY [[C1]](s32)
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; RV32I-NEXT: $x12 = COPY [[C2]](s32)
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; RV32I-NEXT: $x13 = COPY [[C3]](s32)
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; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
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; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
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; RV32I-NEXT: PseudoRET implicit $x10
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;
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; RV64I-LABEL: name: main
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; RV64I: bb.1.entry:
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; RV64I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; RV64I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
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; RV64I-NEXT: G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
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; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV64I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV64I-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
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; RV64I-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
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; RV64I-NEXT: $x10 = COPY [[C1]](s64)
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; RV64I-NEXT: $x11 = COPY [[C2]](s64)
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; RV64I-NEXT: $x12 = COPY [[C3]](s64)
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; RV64I-NEXT: $x13 = COPY [[C4]](s64)
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; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
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; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
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; RV64I-NEXT: $x10 = COPY [[ASSERT_SEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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entry:
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%retval = alloca i32, align 4
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store i32 0, ptr %retval, align 4
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%call = call noundef signext i32 (i32, ...) @foo(i32 noundef signext 0, i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3)
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ret i32 %call
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}
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