eabaee0c59
R_RISCV_CALL/R_RISCV_CALL_PLT distinction is not necessary and R_RISCV_CALL has been deprecated. Since https://reviews.llvm.org/D132530 `call foo` assembles to R_RISCV_CALL_PLT. The `@plt` suffix is not useful and can be removed now (matching AArch64 and PowerPC). GNU assembler assembles `call foo` to RISCV_CALL_PLT since 2022-09 (70f35d72ef04cd23771875c1661c9975044a749c). Without this patch, unconditionally changing MO_CALL to MO_PLT could create `jump .L1@plt, a0`, which is invalid in LLVM integrated assembler and GNU assembler.
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfbfmin -verify-machineinstrs \
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; RUN: -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFBFMIN %s
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; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfbfmin -verify-machineinstrs \
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; RUN: -target-abi lp64f < %s | FileCheck -check-prefix=RV64IZFBFMIN %s
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define bfloat @frem_bf16(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: frem_bf16:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa0
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa1, fa1
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; RV32IZFBFMIN-NEXT: call fmodf
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; RV32IZFBFMIN-NEXT: fcvt.bf16.s fa0, fa0
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; RV32IZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32IZFBFMIN-NEXT: addi sp, sp, 16
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; RV32IZFBFMIN-NEXT: ret
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;
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; RV64IZFBFMIN-LABEL: frem_bf16:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa0
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa1, fa1
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; RV64IZFBFMIN-NEXT: call fmodf
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; RV64IZFBFMIN-NEXT: fcvt.bf16.s fa0, fa0
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; RV64IZFBFMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64IZFBFMIN-NEXT: addi sp, sp, 16
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; RV64IZFBFMIN-NEXT: ret
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%1 = frem bfloat %a, %b
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ret bfloat %1
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}
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