eabaee0c59
R_RISCV_CALL/R_RISCV_CALL_PLT distinction is not necessary and R_RISCV_CALL has been deprecated. Since https://reviews.llvm.org/D132530 `call foo` assembles to R_RISCV_CALL_PLT. The `@plt` suffix is not useful and can be removed now (matching AArch64 and PowerPC). GNU assembler assembles `call foo` to RISCV_CALL_PLT since 2022-09 (70f35d72ef04cd23771875c1661c9975044a749c). Without this patch, unconditionally changing MO_CALL to MO_PLT could create `jump .L1@plt, a0`, which is invalid in LLVM integrated assembler and GNU assembler.
140 lines
4.4 KiB
LLVM
140 lines
4.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -emulated-tls -relocation-model=pic < %s \
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; RUN: | FileCheck -check-prefix=RV32 %s
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; RUN: llc -mtriple=riscv64 -emulated-tls -relocation-model=pic < %s \
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; RUN: | FileCheck -check-prefix=RV64 %s
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@external_x = external thread_local global i32, align 8
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@y = thread_local global i8 7, align 2
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@internal_z = internal thread_local global i64 9, align 16
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define ptr @get_external_x() nounwind {
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; RV32-LABEL: get_external_x:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: addi sp, sp, -16
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; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32-NEXT: .Lpcrel_hi0:
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; RV32-NEXT: auipc a0, %got_pcrel_hi(__emutls_v.external_x)
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; RV32-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi0)(a0)
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; RV32-NEXT: call __emutls_get_address
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; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: ret
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;
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; RV64-LABEL: get_external_x:
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; RV64: # %bb.0: # %entry
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; RV64-NEXT: addi sp, sp, -16
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; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64-NEXT: .Lpcrel_hi0:
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; RV64-NEXT: auipc a0, %got_pcrel_hi(__emutls_v.external_x)
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; RV64-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi0)(a0)
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; RV64-NEXT: call __emutls_get_address
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; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: ret
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entry:
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ret ptr @external_x
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}
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define ptr @get_y() nounwind {
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; RV32-LABEL: get_y:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: addi sp, sp, -16
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; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32-NEXT: .Lpcrel_hi1:
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; RV32-NEXT: auipc a0, %got_pcrel_hi(__emutls_v.y)
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; RV32-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi1)(a0)
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; RV32-NEXT: call __emutls_get_address
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; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: ret
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;
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; RV64-LABEL: get_y:
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; RV64: # %bb.0: # %entry
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; RV64-NEXT: addi sp, sp, -16
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; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64-NEXT: .Lpcrel_hi1:
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; RV64-NEXT: auipc a0, %got_pcrel_hi(__emutls_v.y)
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; RV64-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi1)(a0)
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; RV64-NEXT: call __emutls_get_address
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; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: ret
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entry:
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ret ptr @y
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}
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define ptr @get_internal_z() nounwind {
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; RV32-LABEL: get_internal_z:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: addi sp, sp, -16
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; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32-NEXT: .Lpcrel_hi2:
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; RV32-NEXT: auipc a0, %pcrel_hi(__emutls_v.internal_z)
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; RV32-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
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; RV32-NEXT: call __emutls_get_address
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; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: ret
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;
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; RV64-LABEL: get_internal_z:
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; RV64: # %bb.0: # %entry
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; RV64-NEXT: addi sp, sp, -16
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; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64-NEXT: .Lpcrel_hi2:
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; RV64-NEXT: auipc a0, %pcrel_hi(__emutls_v.internal_z)
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; RV64-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
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; RV64-NEXT: call __emutls_get_address
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; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: ret
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entry:
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ret ptr @internal_z
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}
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; UTC_ARGS: --disable
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; RV32: .data
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; RV32: .globl __emutls_v.y
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; RV32: .p2align 2
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; RV32-LABEL: __emutls_v.y:
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; RV32-NEXT: .word 1
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; RV32-NEXT: .word 2
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; RV32-NEXT: .word 0
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; RV32-NEXT: .word __emutls_t.y
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; RV32: .section .rodata,
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; RV32-LABEL: __emutls_t.y:
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; RV32-NEXT: .byte 7
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; RV32: .data
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; RV32: .p2align 2
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; RV32-LABEL: __emutls_v.internal_z:
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; RV32-NEXT: .word 8
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; RV32-NEXT: .word 16
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; RV32-NEXT: .word 0
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; RV32-NEXT: .word __emutls_t.internal_z
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; RV32: .section .rodata,
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; RV32-LABEL: __emutls_t.internal_z:
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; RV32-NEXT: .quad 9
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; RV64: .data
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; RV64: .globl __emutls_v.y
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; RV64: .p2align 3
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; RV64-LABEL: __emutls_v.y:
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; RV64-NEXT: .quad 1
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; RV64-NEXT: .quad 2
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; RV64-NEXT: .quad 0
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; RV64-NEXT: .quad __emutls_t.y
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; RV64: .section .rodata,
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; RV64-LABEL: __emutls_t.y:
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; RV64-NEXT: .byte 7
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; RV64: .data
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; RV64: .p2align 3
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; RV64-LABEL: __emutls_v.internal_z:
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; RV64-NEXT: .quad 8
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; RV64-NEXT: .quad 16
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; RV64-NEXT: .quad 0
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; RV64-NEXT: .quad __emutls_t.internal_z
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; RV64: .section .rodata,
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; RV64-LABEL: __emutls_t.internal_z:
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; RV64-NEXT: .quad 9
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