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clang-p2996/llvm/test/CodeGen/RISCV/pr53662.mir
luxufan e098281c27 [RISCV] Don't getDebugLoc for the end node of MBB iterator
Because of shrink wrapping, the block to insert epilog may don't have
instructions (Only debug instructions). And the position to insert may
point to MBB.end() that don't have a DebugLoc. This patch fix this
problem.

The test program was copied from the issue:https://github.com/llvm/llvm-project/issues/53662

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D123679
2022-04-30 16:00:20 +08:00

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823 B
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=prologepilog -o - %s | FileCheck %s
--- |
define void @b() {
entry:
unreachable
}
...
---
name: b
frameInfo:
savePoint: '%bb.0'
restorePoint: '%bb.1'
body: |
; CHECK-LABEL: name: b
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: PseudoBR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: DBG_VALUE $noreg
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: PseudoRET implicit killed $x10
bb.0 :
PseudoBR %bb.1
bb.1:
DBG_VALUE $noreg
bb.2:
PseudoRET implicit killed $x10
...