74f985b793
V implies Zvl128b, but a lot of the fixed vector tests also redundantly specify -riscv-v-vector-bits-min=128. This patch removes them where there isn't another minimum vlen being tested for, and for cases where Zve* is being used Zvl128b was added to maintain the old test diff (and because an awkward vlen probably isn't interesting to test for). Other places where -risc-v-vector-bits-min were being used were replaced with Zvl.
22 lines
1.2 KiB
LLVM
22 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64-unknown-unknown-elf"
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define dso_local <16 x i16> @interleave(<8 x i16> %v0, <8 x i16> %v1) {
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; CHECK-LABEL: interleave:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vwaddu.vv v10, v8, v9
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; CHECK-NEXT: li a0, -1
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; CHECK-NEXT: vwmaccu.vx v10, a0, v9
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; CHECK-NEXT: vmv2r.v v8, v10
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; CHECK-NEXT: ret
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entry:
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%v2 = shufflevector <8 x i16> %v0, <8 x i16> poison, <16 x i32> <i32 0, i32 undef, i32 1, i32 undef, i32 2, i32 undef, i32 3, i32 undef, i32 4, i32 undef, i32 5, i32 undef, i32 6, i32 undef, i32 7, i32 undef>
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%v3 = shufflevector <8 x i16> %v1, <8 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%v4 = shufflevector <16 x i16> %v2, <16 x i16> %v3, <16 x i32> <i32 0, i32 16, i32 2, i32 17, i32 4, i32 18, i32 6, i32 19, i32 8, i32 20, i32 10, i32 21, i32 12, i32 22, i32 14, i32 23>
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ret <16 x i16> %v4
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}
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