eb26edbbf8
If we're falling back to generic constant formation in a register + add/sub, we can check if we have a constant which is 12-bits but left shifted by 2 or 3. If so, we can use a sh2add or sh3add to perform the shift and add in a single instruction. This is profitable when the unshifted constant would require two instructions (LUI/ADDI) to form, but is never harmful since we're going to need at least two instructions regardless of the constant value. Since stacks are aligned to 16 bytes by default, sh3add allows addresing (aligned) data out to 2^14 (i.e. 16kb) in at most two instructions w/zba.
377 lines
12 KiB
LLVM
377 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefixes=RV32,RV32I
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -mattr=+zba < %s \
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; RUN: | FileCheck %s -check-prefixes=RV32,RV32ZBA
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefixes=RV64,RV64I
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs -mattr=+zba < %s \
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; RUN: | FileCheck %s -check-prefixes=RV64,RV64ZBA
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declare void @inspect(...)
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define void @test() {
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; RV32I-LABEL: test:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -2032
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; RV32I-NEXT: .cfi_def_cfa_offset 2032
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; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32I-NEXT: .cfi_offset ra, -4
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; RV32I-NEXT: addi sp, sp, -2048
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; RV32I-NEXT: addi sp, sp, -1120
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; RV32I-NEXT: .cfi_def_cfa_offset 5200
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; RV32I-NEXT: addi a0, sp, 12
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; RV32I-NEXT: addi a1, sp, 2047
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; RV32I-NEXT: addi a1, a1, 13
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; RV32I-NEXT: lui a2, 1
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; RV32I-NEXT: addi a2, a2, 12
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; RV32I-NEXT: add a2, sp, a2
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; RV32I-NEXT: lui a3, 1
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; RV32I-NEXT: addi a3, a3, 1036
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; RV32I-NEXT: add a3, sp, a3
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; RV32I-NEXT: call inspect
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: addi sp, sp, 1136
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; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: ret
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;
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; RV32ZBA-LABEL: test:
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; RV32ZBA: # %bb.0:
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; RV32ZBA-NEXT: addi sp, sp, -2032
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV32ZBA-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32ZBA-NEXT: .cfi_offset ra, -4
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; RV32ZBA-NEXT: addi sp, sp, -2048
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; RV32ZBA-NEXT: addi sp, sp, -1120
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 5200
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; RV32ZBA-NEXT: addi a0, sp, 12
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; RV32ZBA-NEXT: addi a1, sp, 2047
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; RV32ZBA-NEXT: addi a1, a1, 13
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; RV32ZBA-NEXT: li a2, 1027
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; RV32ZBA-NEXT: sh2add a2, a2, sp
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; RV32ZBA-NEXT: li a3, 1283
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; RV32ZBA-NEXT: sh2add a3, a3, sp
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; RV32ZBA-NEXT: call inspect
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: addi sp, sp, 1136
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; RV32ZBA-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: ret
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;
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; RV64I-LABEL: test:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -2032
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; RV64I-NEXT: .cfi_def_cfa_offset 2032
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; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64I-NEXT: .cfi_offset ra, -8
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; RV64I-NEXT: addi sp, sp, -2048
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; RV64I-NEXT: addi sp, sp, -1120
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; RV64I-NEXT: .cfi_def_cfa_offset 5200
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; RV64I-NEXT: addi a0, sp, 8
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; RV64I-NEXT: addi a1, sp, 2047
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; RV64I-NEXT: addi a1, a1, 9
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; RV64I-NEXT: lui a2, 1
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; RV64I-NEXT: addiw a2, a2, 8
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; RV64I-NEXT: add a2, sp, a2
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; RV64I-NEXT: lui a3, 1
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; RV64I-NEXT: addiw a3, a3, 1032
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; RV64I-NEXT: add a3, sp, a3
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; RV64I-NEXT: call inspect
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: addi sp, sp, 1136
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; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: ret
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;
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; RV64ZBA-LABEL: test:
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; RV64ZBA: # %bb.0:
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; RV64ZBA-NEXT: addi sp, sp, -2032
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV64ZBA-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64ZBA-NEXT: .cfi_offset ra, -8
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; RV64ZBA-NEXT: addi sp, sp, -2048
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; RV64ZBA-NEXT: addi sp, sp, -1120
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 5200
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; RV64ZBA-NEXT: addi a0, sp, 8
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; RV64ZBA-NEXT: addi a1, sp, 2047
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; RV64ZBA-NEXT: addi a1, a1, 9
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; RV64ZBA-NEXT: li a2, 513
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; RV64ZBA-NEXT: sh3add a2, a2, sp
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; RV64ZBA-NEXT: li a3, 641
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; RV64ZBA-NEXT: sh3add a3, a3, sp
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; RV64ZBA-NEXT: call inspect
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: addi sp, sp, 1136
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; RV64ZBA-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: ret
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%p4 = alloca [64 x i8], align 1
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%p3 = alloca [1024 x i8], align 1
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%p2 = alloca [2048 x i8], align 1
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%p1 = alloca [2048 x i8], align 1
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call void (...) @inspect(ptr %p1, ptr %p2, ptr %p3, ptr %p4)
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ret void
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}
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define void @align_8() {
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; RV32I-LABEL: align_8:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -2032
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; RV32I-NEXT: .cfi_def_cfa_offset 2032
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; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32I-NEXT: .cfi_offset ra, -4
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; RV32I-NEXT: addi sp, sp, -2048
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: .cfi_def_cfa_offset 4112
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; RV32I-NEXT: addi a0, sp, 7
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; RV32I-NEXT: lui a1, 1
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; RV32I-NEXT: addi a1, a1, 8
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; RV32I-NEXT: add a1, sp, a1
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; RV32I-NEXT: call inspect
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: addi sp, sp, 48
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; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: ret
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;
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; RV32ZBA-LABEL: align_8:
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; RV32ZBA: # %bb.0:
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; RV32ZBA-NEXT: addi sp, sp, -2032
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV32ZBA-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32ZBA-NEXT: .cfi_offset ra, -4
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; RV32ZBA-NEXT: addi sp, sp, -2048
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; RV32ZBA-NEXT: addi sp, sp, -32
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 4112
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; RV32ZBA-NEXT: addi a0, sp, 7
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; RV32ZBA-NEXT: li a1, 513
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; RV32ZBA-NEXT: sh3add a1, a1, sp
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; RV32ZBA-NEXT: call inspect
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: addi sp, sp, 48
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; RV32ZBA-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: ret
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;
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; RV64I-LABEL: align_8:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -2032
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; RV64I-NEXT: .cfi_def_cfa_offset 2032
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; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64I-NEXT: .cfi_offset ra, -8
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; RV64I-NEXT: addi sp, sp, -2048
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: .cfi_def_cfa_offset 4128
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; RV64I-NEXT: addi a0, sp, 15
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; RV64I-NEXT: lui a1, 1
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; RV64I-NEXT: addiw a1, a1, 16
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; RV64I-NEXT: add a1, sp, a1
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; RV64I-NEXT: call inspect
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: addi sp, sp, 64
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; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: ret
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;
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; RV64ZBA-LABEL: align_8:
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; RV64ZBA: # %bb.0:
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; RV64ZBA-NEXT: addi sp, sp, -2032
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV64ZBA-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64ZBA-NEXT: .cfi_offset ra, -8
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; RV64ZBA-NEXT: addi sp, sp, -2048
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; RV64ZBA-NEXT: addi sp, sp, -48
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 4128
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; RV64ZBA-NEXT: addi a0, sp, 15
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; RV64ZBA-NEXT: li a1, 514
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; RV64ZBA-NEXT: sh3add a1, a1, sp
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; RV64ZBA-NEXT: call inspect
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: addi sp, sp, 64
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; RV64ZBA-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: ret
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%p2 = alloca i8, align 8
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%p1 = alloca [4097 x i8], align 1
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call void (...) @inspect(ptr %p1, ptr %p2)
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ret void
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}
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define void @align_4() {
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; RV32I-LABEL: align_4:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -2032
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; RV32I-NEXT: .cfi_def_cfa_offset 2032
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; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32I-NEXT: .cfi_offset ra, -4
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; RV32I-NEXT: addi sp, sp, -2048
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: .cfi_def_cfa_offset 4112
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; RV32I-NEXT: addi a0, sp, 7
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; RV32I-NEXT: lui a1, 1
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; RV32I-NEXT: addi a1, a1, 8
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; RV32I-NEXT: add a1, sp, a1
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; RV32I-NEXT: call inspect
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: addi sp, sp, 48
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; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: ret
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;
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; RV32ZBA-LABEL: align_4:
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; RV32ZBA: # %bb.0:
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; RV32ZBA-NEXT: addi sp, sp, -2032
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV32ZBA-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32ZBA-NEXT: .cfi_offset ra, -4
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; RV32ZBA-NEXT: addi sp, sp, -2048
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; RV32ZBA-NEXT: addi sp, sp, -32
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; RV32ZBA-NEXT: .cfi_def_cfa_offset 4112
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; RV32ZBA-NEXT: addi a0, sp, 7
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; RV32ZBA-NEXT: li a1, 513
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; RV32ZBA-NEXT: sh3add a1, a1, sp
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; RV32ZBA-NEXT: call inspect
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: addi sp, sp, 48
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; RV32ZBA-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32ZBA-NEXT: addi sp, sp, 2032
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; RV32ZBA-NEXT: ret
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;
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; RV64I-LABEL: align_4:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -2032
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; RV64I-NEXT: .cfi_def_cfa_offset 2032
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; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64I-NEXT: .cfi_offset ra, -8
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; RV64I-NEXT: addi sp, sp, -2048
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: .cfi_def_cfa_offset 4128
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; RV64I-NEXT: addi a0, sp, 19
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; RV64I-NEXT: lui a1, 1
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; RV64I-NEXT: addiw a1, a1, 20
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; RV64I-NEXT: add a1, sp, a1
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; RV64I-NEXT: call inspect
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: addi sp, sp, 64
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; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 2032
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; RV64I-NEXT: ret
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;
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; RV64ZBA-LABEL: align_4:
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; RV64ZBA: # %bb.0:
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; RV64ZBA-NEXT: addi sp, sp, -2032
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 2032
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; RV64ZBA-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64ZBA-NEXT: .cfi_offset ra, -8
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; RV64ZBA-NEXT: addi sp, sp, -2048
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; RV64ZBA-NEXT: addi sp, sp, -48
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; RV64ZBA-NEXT: .cfi_def_cfa_offset 4128
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; RV64ZBA-NEXT: addi a0, sp, 19
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; RV64ZBA-NEXT: li a1, 1029
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; RV64ZBA-NEXT: sh2add a1, a1, sp
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; RV64ZBA-NEXT: call inspect
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: addi sp, sp, 64
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; RV64ZBA-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64ZBA-NEXT: addi sp, sp, 2032
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; RV64ZBA-NEXT: ret
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%p2 = alloca i8, align 4
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%p1 = alloca [4097 x i8], align 1
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call void (...) @inspect(ptr %p1, ptr %p2)
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ret void
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}
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define void @align_2() {
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; RV32-LABEL: align_2:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -2032
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; RV32-NEXT: .cfi_def_cfa_offset 2032
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; RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: addi sp, sp, -2048
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; RV32-NEXT: addi sp, sp, -32
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; RV32-NEXT: .cfi_def_cfa_offset 4112
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; RV32-NEXT: addi a0, sp, 9
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; RV32-NEXT: lui a1, 1
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; RV32-NEXT: addi a1, a1, 10
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; RV32-NEXT: add a1, sp, a1
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; RV32-NEXT: call inspect
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: addi sp, sp, 48
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; RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: ret
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;
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; RV64-LABEL: align_2:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -2032
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; RV64-NEXT: .cfi_def_cfa_offset 2032
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; RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: addi sp, sp, -2048
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; RV64-NEXT: addi sp, sp, -48
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; RV64-NEXT: .cfi_def_cfa_offset 4128
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; RV64-NEXT: addi a0, sp, 21
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; RV64-NEXT: lui a1, 1
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; RV64-NEXT: addiw a1, a1, 22
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; RV64-NEXT: add a1, sp, a1
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; RV64-NEXT: call inspect
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; RV64-NEXT: addi sp, sp, 2032
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; RV64-NEXT: addi sp, sp, 64
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; RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 2032
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; RV64-NEXT: ret
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%p2 = alloca i8, align 2
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%p1 = alloca [4097 x i8], align 1
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call void (...) @inspect(ptr %p1, ptr %p2)
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ret void
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}
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define void @align_1() {
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; RV32-LABEL: align_1:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -2032
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; RV32-NEXT: .cfi_def_cfa_offset 2032
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; RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: addi sp, sp, -2048
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; RV32-NEXT: addi sp, sp, -32
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; RV32-NEXT: .cfi_def_cfa_offset 4112
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; RV32-NEXT: addi a0, sp, 10
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; RV32-NEXT: lui a1, 1
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; RV32-NEXT: addi a1, a1, 11
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; RV32-NEXT: add a1, sp, a1
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; RV32-NEXT: call inspect
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: addi sp, sp, 48
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; RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: ret
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;
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; RV64-LABEL: align_1:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -2032
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; RV64-NEXT: .cfi_def_cfa_offset 2032
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; RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
|
|
; RV64-NEXT: .cfi_offset ra, -8
|
|
; RV64-NEXT: addi sp, sp, -2048
|
|
; RV64-NEXT: addi sp, sp, -48
|
|
; RV64-NEXT: .cfi_def_cfa_offset 4128
|
|
; RV64-NEXT: addi a0, sp, 22
|
|
; RV64-NEXT: lui a1, 1
|
|
; RV64-NEXT: addiw a1, a1, 23
|
|
; RV64-NEXT: add a1, sp, a1
|
|
; RV64-NEXT: call inspect
|
|
; RV64-NEXT: addi sp, sp, 2032
|
|
; RV64-NEXT: addi sp, sp, 64
|
|
; RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
|
|
; RV64-NEXT: addi sp, sp, 2032
|
|
; RV64-NEXT: ret
|
|
%p2 = alloca i8, align 1
|
|
%p1 = alloca [4097 x i8], align 1
|
|
call void (...) @inspect(ptr %p1, ptr %p2)
|
|
ret void
|
|
}
|