a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
197 lines
5.5 KiB
LLVM
197 lines
5.5 KiB
LLVM
; Test 32-bit compare and swap.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check the low end of the CS range.
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define i32 @f1(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f1:
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK: br %r14
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%pair = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the high end of the aligned CS range.
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define i32 @f2(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f2:
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; CHECK: cs %r2, %r3, 4092(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 1023
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the next word up, which should use CSY instead of CS.
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define i32 @f3(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f3:
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; CHECK: csy %r2, %r3, 4096(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 1024
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the high end of the aligned CSY range.
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define i32 @f4(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f4:
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; CHECK: csy %r2, %r3, 524284(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 131071
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i32 @f5(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f5:
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; CHECK: agfi %r4, 524288
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 131072
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the high end of the negative aligned CSY range.
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define i32 @f6(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f6:
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; CHECK: csy %r2, %r3, -4(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 -1
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the low end of the CSY range.
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define i32 @f7(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f7:
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; CHECK: csy %r2, %r3, -524288(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 -131072
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check the next word down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i32 @f8(i32 %cmp, i32 %swap, ptr %src) {
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; CHECK-LABEL: f8:
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; CHECK: agfi %r4, -524292
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 -131073
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check that CS does not allow an index.
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define i32 @f9(i32 %cmp, i32 %swap, i64 %src, i64 %index) {
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; CHECK-LABEL: f9:
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; CHECK: agr %r4, %r5
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%ptr = inttoptr i64 %add1 to ptr
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check that CSY does not allow an index.
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define i32 @f10(i32 %cmp, i32 %swap, i64 %src, i64 %index) {
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; CHECK-LABEL: f10:
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; CHECK: agr %r4, %r5
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; CHECK: csy %r2, %r3, 4096(%r4)
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 4096
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%ptr = inttoptr i64 %add2 to ptr
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check that a constant %cmp value is loaded into a register first.
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define i32 @f11(i32 %dummy, i32 %swap, ptr %ptr) {
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; CHECK-LABEL: f11:
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; CHECK: lhi %r2, 1001
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK: br %r14
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%pair = cmpxchg ptr %ptr, i32 1001, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check that a constant %swap value is loaded into a register first.
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define i32 @f12(i32 %cmp, ptr %ptr) {
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; CHECK-LABEL: f12:
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; CHECK: lhi [[SWAP:%r[0-9]+]], 1002
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; CHECK: cs %r2, [[SWAP]], 0(%r3)
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; CHECK: br %r14
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%pair = cmpxchg ptr %ptr, i32 %cmp, i32 1002 seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pair, 0
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ret i32 %val
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}
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; Check generating the comparison result.
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; CHECK-LABEL: f13
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: afi %r2, -268435456
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; CHECK-NEXT: srl %r2, 31
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; CHECK: br %r14
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define i32 @f13(i32 %cmp, i32 %swap, ptr %src) {
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%pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst
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%val = extractvalue { i32, i1 } %pairval, 1
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%res = zext i1 %val to i32
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ret i32 %res
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}
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declare void @g()
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; Check using the comparison result for a branch.
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; CHECK-LABEL: f14
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK-NEXT: jge g
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; CHECK: br %r14
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define void @f14(i32 %cmp, i32 %swap, ptr %src) {
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%pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst
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%cond = extractvalue { i32, i1 } %pairval, 1
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br i1 %cond, label %call, label %exit
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call:
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tail call void @g()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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; CHECK-LABEL: f15
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; CHECK: cs %r2, %r3, 0(%r4)
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; CHECK-NEXT: jgl g
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; CHECK: br %r14
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define void @f15(i32 %cmp, i32 %swap, ptr %src) {
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%pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst
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%cond = extractvalue { i32, i1 } %pairval, 1
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br i1 %cond, label %exit, label %call
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call:
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tail call void @g()
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br label %exit
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exit:
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ret void
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}
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