a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
205 lines
5.4 KiB
LLVM
205 lines
5.4 KiB
LLVM
; Test f64 conditional stores that are presented as selects.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare void @foo(ptr)
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; Test with the loaded value first.
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define void @f1(ptr %ptr, double %alt, i32 %limit) {
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; CHECK-LABEL: f1:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: std %f0, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; ...and with the loaded value second
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define void @f2(ptr %ptr, double %alt, i32 %limit) {
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; CHECK-LABEL: f2:
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; CHECK-NOT: %r2
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; CHECK: bher %r14
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; CHECK-NOT: %r2
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; CHECK: std %f0, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %alt, double %orig
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store double %res, ptr %ptr
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ret void
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}
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; Check the high end of the aligned STD range.
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define void @f3(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f3:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: std %f0, 4088(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 511
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check the next doubleword up, which should use STDY instead of STD.
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define void @f4(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: stdy %f0, 4096(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 512
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check the high end of the aligned STDY range.
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define void @f5(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f5:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: stdy %f0, 524280(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 65535
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f6(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f6:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: agfi %r2, 524288
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; CHECK: std %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 65536
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check the low end of the STDY range.
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define void @f7(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f7:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: stdy %f0, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 -65536
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f8(ptr %base, double %alt, i32 %limit) {
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; CHECK-LABEL: f8:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: agfi %r2, -524296
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; CHECK: std %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 -65537
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check that STDY allows an index.
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define void @f9(i64 %base, i64 %index, double %alt, i32 %limit) {
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; CHECK-LABEL: f9:
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; CHECK-NOT: %r2
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; CHECK: blr %r14
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; CHECK-NOT: %r2
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; CHECK: stdy %f0, 524287(%r3,%r2)
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to ptr
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; Check that volatile loads are not matched.
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define void @f10(ptr %ptr, double %alt, i32 %limit) {
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; CHECK-LABEL: f10:
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; CHECK: ld {{%f[0-5]}}, 0(%r2)
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; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
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; CHECK: [[LABEL]]:
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; CHECK: std {{%f[0-5]}}, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 420
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%orig = load volatile double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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ret void
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}
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; ...likewise stores. In this case we should have a conditional load into %f0.
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define void @f11(ptr %ptr, double %alt, i32 %limit) {
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; CHECK-LABEL: f11:
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; CHECK: jhe [[LABEL:[^ ]*]]
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; CHECK: ld %f0, 0(%r2)
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; CHECK: [[LABEL]]:
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; CHECK: std %f0, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store volatile double %res, ptr %ptr
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ret void
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}
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; Try a frame index base.
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define void @f12(double %alt, i32 %limit) {
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; CHECK-LABEL: f12:
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; CHECK: brasl %r14, foo@PLT
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; CHECK-NOT: %r15
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; CHECK: jl [[LABEL:[^ ]*]]
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; CHECK-NOT: %r15
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; CHECK: std {{%f[0-9]+}}, {{[0-9]+}}(%r15)
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; CHECK: [[LABEL]]:
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; CHECK: brasl %r14, foo@PLT
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; CHECK: br %r14
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%ptr = alloca double
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call void @foo(ptr %ptr)
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%cond = icmp ult i32 %limit, 420
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%orig = load double, ptr %ptr
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%res = select i1 %cond, double %orig, double %alt
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store double %res, ptr %ptr
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call void @foo(ptr %ptr)
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ret void
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}
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