a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
56 lines
1.9 KiB
LLVM
56 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z14 | FileCheck %s
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;
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; Test folding of spilled immediate loads and compares.
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define i32 @fun0(ptr %src, i32 %arg) nounwind {
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; CHECK-LABEL: fun0:
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; CHECK: mvhi 160(%r15), 0 # 4-byte Folded Spill
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; CHECK: mvc 160(4,%r15), 0(%r2) # 4-byte Folded Spill
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; CHECK-LABEL: .LBB0_2:
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; CHECK: chsi 160(%r15), 2 # 4-byte Folded Reload
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entry:
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%cmp = icmp eq i32 %arg, 0
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br i1 %cmp, label %cond, label %exit
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cond:
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%val0 = load i32, ptr %src
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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br label %exit
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exit:
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%tmp0 = phi i32 [0, %entry], [%val0, %cond]
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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%cmp0 = icmp ne i32 %tmp0, 2
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%zxt0 = zext i1 %cmp0 to i32
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%and0 = and i32 %arg, %zxt0
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ret i32 %and0
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}
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define i64 @fun1(ptr %src, i64 %arg) nounwind {
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; CHECK-LABEL: fun1:
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; CHECK: mvghi 160(%r15), 0 # 8-byte Folded Spill
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; CHECK: mvc 160(8,%r15), 0(%r2) # 8-byte Folded Spill
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; CHECK-LABEL: .LBB1_2:
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; CHECK: cghsi 160(%r15), 2 # 8-byte Folded Reload
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entry:
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%cmp = icmp eq i64 %arg, 0
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br i1 %cmp, label %cond, label %exit
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cond:
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%val0 = load i64, ptr %src
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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br label %exit
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exit:
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%tmp0 = phi i64 [0, %entry], [%val0, %cond]
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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%cmp0 = icmp ne i64 %tmp0, 2
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%zxt0 = zext i1 %cmp0 to i64
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%and0 = and i64 %arg, %zxt0
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ret i64 %and0
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}
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