a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
73 lines
2.1 KiB
LLVM
73 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Test conversion of floating-point values to unsigned i32s (z10 only).
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; z10 doesn't have native support for unsigned fp-to-i32 conversions;
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; they were added in z196 as the Convert to Logical family of instructions.
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; Promoting to i64 doesn't generate an inexact condition for values that are
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; outside the i32 range but in the i64 range, so use the default expansion.
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; Test f32->i32.
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define i32 @f1(float %f) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI0_0
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; CHECK-NEXT: le %f1, 0(%r1)
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; CHECK-NEXT: cebr %f0, %f1
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; CHECK-NEXT: jnl .LBB0_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: cfebr %r2, 5, %f0
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; CHECK-NEXT: br %r14
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: sebr %f0, %f1
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; CHECK-NEXT: cfebr %r2, 5, %f0
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; CHECK-NEXT: xilf %r2, 2147483648
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; CHECK-NEXT: br %r14
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%conv = fptoui float %f to i32
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ret i32 %conv
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}
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; Test f64->i32.
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define i32 @f2(double %f) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI1_0
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; CHECK-NEXT: ld %f1, 0(%r1)
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; CHECK-NEXT: cdbr %f0, %f1
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; CHECK-NEXT: jnl .LBB1_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: cfdbr %r2, 5, %f0
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; CHECK-NEXT: br %r14
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; CHECK-NEXT: .LBB1_2:
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; CHECK-NEXT: sdbr %f0, %f1
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; CHECK-NEXT: cfdbr %r2, 5, %f0
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; CHECK-NEXT: xilf %r2, 2147483648
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; CHECK-NEXT: br %r14
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%conv = fptoui double %f to i32
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ret i32 %conv
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}
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; Test f128->i32.
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define i32 @f3(ptr %src) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ld %f0, 0(%r2)
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; CHECK-NEXT: ld %f2, 8(%r2)
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; CHECK-NEXT: larl %r1, .LCPI2_0
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; CHECK-NEXT: lxeb %f1, 0(%r1)
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; CHECK-NEXT: cxbr %f0, %f1
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; CHECK-NEXT: jnl .LBB2_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: cfxbr %r2, 5, %f0
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; CHECK-NEXT: br %r14
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: sxbr %f0, %f1
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; CHECK-NEXT: cfxbr %r2, 5, %f0
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; CHECK-NEXT: xilf %r2, 2147483648
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; CHECK-NEXT: br %r14
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%f = load fp128, ptr %src
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%conv = fptoui fp128 %f to i32
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ret i32 %conv
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}
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