a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
79 lines
1.8 KiB
LLVM
79 lines
1.8 KiB
LLVM
; Test 64-bit GPR loads.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check LG with no displacement.
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define i64 @f1(ptr %src) {
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; CHECK-LABEL: f1:
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; CHECK: lg %r2, 0(%r2)
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; CHECK: br %r14
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%val = load i64, ptr %src
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ret i64 %val
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}
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; Check the high end of the aligned LG range.
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define i64 @f2(ptr %src) {
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; CHECK-LABEL: f2:
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; CHECK: lg %r2, 524280(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %src, i64 65535
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f3(ptr %src) {
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; CHECK-LABEL: f3:
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; CHECK: agfi %r2, 524288
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; CHECK: lg %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %src, i64 65536
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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; Check the high end of the negative aligned LG range.
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define i64 @f4(ptr %src) {
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; CHECK-LABEL: f4:
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; CHECK: lg %r2, -8(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -1
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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; Check the low end of the LG range.
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define i64 @f5(ptr %src) {
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; CHECK-LABEL: f5:
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; CHECK: lg %r2, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -65536
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f6(ptr %src) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r2, -524296
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; CHECK: lg %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -65537
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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; Check that LG allows an index.
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define i64 @f7(i64 %src, i64 %index) {
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; CHECK-LABEL: f7:
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; CHECK: lg %r2, 524287({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to ptr
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%val = load i64, ptr %ptr
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ret i64 %val
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}
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