a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
249 lines
7.3 KiB
LLVM
249 lines
7.3 KiB
LLVM
; Test 32-bit subtraction in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i32 @foo()
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; Check subtractions of 1.
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define zeroext i1 @f1(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f1:
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; CHECK: ahi %r3, -1
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the high end of the AHI range.
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define zeroext i1 @f2(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f2:
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; CHECK: ahi %r3, -32768
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32768)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value up, which must use AFI instead.
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define zeroext i1 @f3(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f3:
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; CHECK: afi %r3, -32769
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32769)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the high end of the signed 32-bit range.
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define zeroext i1 @f4(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f4:
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; CHECK: afi %r3, -2147483647
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483647)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value up, which is treated as a negative value
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; and must use a register.
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define zeroext i1 @f5(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f5:
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; CHECK: llilh [[REG1:%r[0-5]]], 32768
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; CHECK: sr %r3, [[REG1]]
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483648)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value up, which is treated as a negative value,
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; and can use AFI again.
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define zeroext i1 @f6(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f6:
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; CHECK: afi %r3, 2147483647
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483649)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the high end of the negative AHI range.
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define zeroext i1 @f7(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f7:
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; CHECK: ahi %r3, 1
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the low end of the AHI range.
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define zeroext i1 @f8(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f8:
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; CHECK: ahi %r3, 32767
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32767)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value down, which must use AFI instead.
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define zeroext i1 @f9(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f9:
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; CHECK: afi %r3, 32768
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32768)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the low end of the signed 32-bit range.
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define zeroext i1 @f10(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f10:
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; CHECK: afi %r3, 2147483647
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483647)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value down, which must use a register.
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define zeroext i1 @f11(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f11:
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; CHECK: llilh [[REG1:%r[0-5]]], 32768
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; CHECK: sr %r3, [[REG1]]
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483648)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value down, which is treated as a positive value.
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define zeroext i1 @f12(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f12:
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; CHECK: afi %r3, -2147483647
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], 1342177280
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483649)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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; Check using the overflow result for a branch.
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define void @f13(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f13:
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; CHECK: ahi %r3, -1
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; CHECK: st %r3, 0(%r4)
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; CHECK: {{jgo foo@PLT|bnor %r14}}
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; CHECK: {{br %r14|jg foo@PLT}}
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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br i1 %obit, label %call, label %exit
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call:
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tail call i32 @foo()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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define void @f14(i32 %dummy, i32 %a, ptr %res) {
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; CHECK-LABEL: f14:
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; CHECK: ahi %r3, -1
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; CHECK: st %r3, 0(%r4)
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; CHECK: {{jgno foo@PLT|bor %r14}}
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; CHECK: {{br %r14|jg foo@PLT}}
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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br i1 %obit, label %exit, label %call
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call:
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tail call i32 @foo()
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br label %exit
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exit:
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ret void
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}
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declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
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