8998ff53c9
This reverts commit0a762ec1b0. Some CPUs enable fp64 by default (such as cortex-m7). When specifying a single-precision fpu with them like -mfpu=fpv5-sp-d16, the fp64 feature will be disabled, but fpreg64 will not. We need to disable them both correctly under clang in order for the backend to be able to use the reliably. In the meantime this reverts0a762ec1b0until that issue is fixed.
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve %s -o - | FileCheck %s
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; This test was getting the offset of a store's pointer info incorrect, leading to the
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; incorrect aliasing info an the store moving past a dependant load.
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define arm_aapcs_vfpcc double @zero(double %a, double %b, double %c) {
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; CHECK-LABEL: zero:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r4, lr}
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: .vsave {d8, d9}
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; CHECK-NEXT: vpush {d8, d9}
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; CHECK-NEXT: .pad #8
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; CHECK-NEXT: sub sp, #8
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; CHECK-NEXT: vmov.f32 s16, s2
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; CHECK-NEXT: vmov.f32 s18, s0
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; CHECK-NEXT: vmov.f32 s17, s3
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; CHECK-NEXT: vmov.f32 s19, s1
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; CHECK-NEXT: bl sqrt
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; CHECK-NEXT: vmov r2, r3, d8
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; CHECK-NEXT: vmov r0, r1, d0
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; CHECK-NEXT: bl __aeabi_dadd
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; CHECK-NEXT: str r1, [sp, #4]
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; CHECK-NEXT: mov r4, r0
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; CHECK-NEXT: ldrb.w r0, [sp, #7]
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; CHECK-NEXT: eor r0, r0, #128
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; CHECK-NEXT: strb.w r0, [sp, #7]
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; CHECK-NEXT: vmov r0, r1, d9
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; CHECK-NEXT: mov r2, r0
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: bl __aeabi_dadd
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: ldr r1, [sp, #4]
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; CHECK-NEXT: mov r2, r0
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; CHECK-NEXT: mov r0, r4
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; CHECK-NEXT: bl __aeabi_ddiv
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; CHECK-NEXT: vmov d0, r0, r1
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; CHECK-NEXT: add sp, #8
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; CHECK-NEXT: vpop {d8, d9}
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; CHECK-NEXT: pop {r4, pc}
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entry:
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%call = tail call nnan nsz arm_aapcs_vfpcc double @sqrt(double %a)
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%0 = fadd nnan nsz double %call, %b
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%sub3 = fneg nnan nsz double %0
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%mul4 = fmul nnan nsz double %a, 2.000000e+00
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%div = fdiv nnan nsz double %sub3, %mul4
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ret double %div
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}
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declare arm_aapcs_vfpcc double @sqrt(double)
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