69a322fed1
There are a variety of cases where we want more control over the exact
instruction emitted. This commit creates a new pass to fixup
instructions after the DAG has been lowered. The pass is only meant to
replace instructions that are guranteed to be interchangable, not to
do analysis for special cases.
Handling these instruction changes in in X86ISelLowering of
X86ISelDAGToDAG isn't ideal, as its liable to either break existing
patterns that expected a certain instruction or generate infinite
loops.
As well, operating as the MachineInstruction level allows us to access
scheduling/code size information for making the decisions.
Currently only implements `{v}permilps` -> `{v}shufps/{v}shufd` but
more transforms can be added.
Differential Revision: https://reviews.llvm.org/D143787
230 lines
8.4 KiB
LLVM
230 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
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define <32 x i8> @funcA(<32 x i8> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcA:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%shuffle = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <32 x i8> %shuffle
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}
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define <16 x i16> @funcB(<16 x i16> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcB:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,5,5,5]
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%shuffle = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <16 x i16> %shuffle
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}
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define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp {
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; X86-LABEL: funcC:
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; X86: # %bb.0: # %entry
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; X86-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: funcC:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vmovq %rdi, %xmm0
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; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; X64-NEXT: retq
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entry:
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%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
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%vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
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%vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
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%vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
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ret <4 x i64> %vecinit6.i
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}
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define <4 x double> @funcD(double %q) nounwind uwtable readnone ssp {
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; X86-LABEL: funcD:
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; X86: # %bb.0: # %entry
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; X86-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: funcD:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; X64-NEXT: retq
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entry:
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%vecinit.i = insertelement <4 x double> undef, double %q, i32 0
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%vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
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%vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
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%vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
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ret <4 x double> %vecinit6.i
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}
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; Test this turns into a broadcast:
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; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
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;
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define <8 x float> @funcE() nounwind {
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; X86-LABEL: funcE:
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; X86: # %bb.0: # %allocas
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: testb %al, %al
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; X86-NEXT: # implicit-def: $ymm0
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; X86-NEXT: jne .LBB4_2
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; X86-NEXT: # %bb.1: # %load.i1247
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: andl $-32, %esp
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; X86-NEXT: subl $1312, %esp # imm = 0x520
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; X86-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm0
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: .LBB4_2: # %__load_and_broadcast_32.exit1249
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; X86-NEXT: retl
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;
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; X64-LABEL: funcE:
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; X64: # %bb.0: # %allocas
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: testb %al, %al
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; X64-NEXT: # implicit-def: $ymm0
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; X64-NEXT: jne .LBB4_2
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; X64-NEXT: # %bb.1: # %load.i1247
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; X64-NEXT: pushq %rbp
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; X64-NEXT: movq %rsp, %rbp
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; X64-NEXT: andq $-32, %rsp
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; X64-NEXT: subq $1312, %rsp # imm = 0x520
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; X64-NEXT: vbroadcastss {{[0-9]+}}(%rsp), %ymm0
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; X64-NEXT: movq %rbp, %rsp
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; X64-NEXT: popq %rbp
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; X64-NEXT: .LBB4_2: # %__load_and_broadcast_32.exit1249
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; X64-NEXT: retq
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allocas:
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%udx495 = alloca [18 x [18 x float]], align 32
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br label %for_test505.preheader
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for_test505.preheader: ; preds = %for_test505.preheader, %allocas
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br i1 undef, label %for_exit499, label %for_test505.preheader
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for_exit499: ; preds = %for_test505.preheader
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br i1 undef, label %__load_and_broadcast_32.exit1249, label %load.i1247
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load.i1247: ; preds = %for_exit499
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%ptr1227 = getelementptr [18 x [18 x float]], ptr %udx495, i64 0, i64 1, i64 1
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%val.i1238 = load i32, ptr %ptr1227, align 4
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%ret6.i1245 = insertelement <8 x i32> undef, i32 %val.i1238, i32 6
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%ret7.i1246 = insertelement <8 x i32> %ret6.i1245, i32 %val.i1238, i32 7
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%phitmp = bitcast <8 x i32> %ret7.i1246 to <8 x float>
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br label %__load_and_broadcast_32.exit1249
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__load_and_broadcast_32.exit1249: ; preds = %load.i1247, %for_exit499
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%load_broadcast12281250 = phi <8 x float> [ %phitmp, %load.i1247 ], [ undef, %for_exit499 ]
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ret <8 x float> %load_broadcast12281250
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}
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define <8 x float> @funcF(i32 %val) nounwind {
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; X86-LABEL: funcF:
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; X86: # %bb.0:
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; X86-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: funcF:
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; X64: # %bb.0:
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; X64-NEXT: vmovd %edi, %xmm0
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; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; X64-NEXT: retq
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%ret6 = insertelement <8 x i32> undef, i32 %val, i32 6
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%ret7 = insertelement <8 x i32> %ret6, i32 %val, i32 7
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%tmp = bitcast <8 x i32> %ret7 to <8 x float>
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ret <8 x float> %tmp
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}
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define <8 x float> @funcG(<8 x float> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcG:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <8 x float> %shuffle
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}
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define <8 x float> @funcH(<8 x float> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcH:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; CHECK-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,1,1,1,5,5,5,5]
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <8 x float> %shuffle
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}
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define <2 x double> @splat_load_2f64_11(ptr %ptr) {
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; X86-LABEL: splat_load_2f64_11:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: vmovddup 8(%eax), %xmm0 # xmm0 = mem[0,0]
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; X86-NEXT: retl
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;
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; X64-LABEL: splat_load_2f64_11:
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; X64: # %bb.0:
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; X64-NEXT: vmovddup 8(%rdi), %xmm0 # xmm0 = mem[0,0]
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; X64-NEXT: retq
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%x = load <2 x double>, ptr %ptr
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%x1 = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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ret <2 x double> %x1
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}
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define <4 x double> @splat_load_4f64_2222(ptr %ptr) {
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; X86-LABEL: splat_load_4f64_2222:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: vbroadcastsd 16(%eax), %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: splat_load_4f64_2222:
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; X64: # %bb.0:
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; X64-NEXT: vbroadcastsd 16(%rdi), %ymm0
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; X64-NEXT: retq
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%x = load <4 x double>, ptr %ptr
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%x1 = shufflevector <4 x double> %x, <4 x double> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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ret <4 x double> %x1
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}
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define <4 x float> @splat_load_4f32_0000(ptr %ptr) {
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; X86-LABEL: splat_load_4f32_0000:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: vbroadcastss (%eax), %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: splat_load_4f32_0000:
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; X64: # %bb.0:
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; X64-NEXT: vbroadcastss (%rdi), %xmm0
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; X64-NEXT: retq
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%x = load <4 x float>, ptr %ptr
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%x1 = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
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ret <4 x float> %x1
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}
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define <8 x float> @splat_load_8f32_77777777(ptr %ptr) {
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; X86-LABEL: splat_load_8f32_77777777:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: vbroadcastss 28(%eax), %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: splat_load_8f32_77777777:
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; X64: # %bb.0:
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; X64-NEXT: vbroadcastss 28(%rdi), %ymm0
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; X64-NEXT: retq
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%x = load <8 x float>, ptr %ptr
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%x1 = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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ret <8 x float> %x1
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}
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