This stops reporting CostPerUse 1 for `R8`-`R15` and `XMM8`-`XMM31`.
This was previously done because instruction encoding require a REX
prefix when using them resulting in longer instruction encodings. I
found that this regresses the quality of the register allocation as the
costs impose an ordering on eviction candidates. I also feel that there
is a bit of an impedance mismatch as the actual costs occure when
encoding instructions using those registers, but the order of VReg
assignments is not primarily ordered by number of Defs+Uses.
I did extensive measurements with the llvm-test-suite wiht SPEC2006 +
SPEC2017 included, internal services showed similar patterns. Generally
there are a log of improvements but also a lot of regression. But on
average the allocation quality seems to improve at a small code size
regression.
Results for measuring static and dynamic instruction counts:
Dynamic Counts (scaled by execution frequency) / Optimization Remarks:
Spills+FoldedSpills -5.6%
Reloads+FoldedReloads -4.2%
Copies -0.1%
Static / LLVM Statistics:
regalloc.NumSpills mean -1.6%, geomean -2.8%
regalloc.NumReloads mean -1.7%, geomean -3.1%
size..text mean +0.4%, geomean +0.4%
Static / LLVM Statistics:
mean -2.2%, geomean -3.1%) regalloc.NumSpills
mean -2.6%, geomean -3.9%) regalloc.NumReloads
mean +0.6%, geomean +0.6%) size..text
Static / LLVM Statistics:
regalloc.NumSpills mean -3.0%
regalloc.NumReloads mean -3.3%
size..text mean +0.3%, geomean +0.3%
Differential Revision: https://reviews.llvm.org/D133902
46 lines
1.3 KiB
LLVM
46 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -O2 < %s | FileCheck %s
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;; https://llvm.org/PR47468
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;; PHI elimination should place copies BEFORE the inline asm, not
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;; after, even if the inline-asm uses as an input the same value as
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;; the PHI.
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declare void @foo(ptr)
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define void @test1(ptr %arg, ptr %mem) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: .LBB0_1: # Block address taken
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; CHECK-NEXT: # %loop
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movq (%rbx), %r14
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; CHECK-NEXT: callq foo@PLT
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; CHECK-NEXT: movq %r14, %rdi
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # %bb.2: # %end
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; CHECK-NEXT: addq $8, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: retq
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entry:
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br label %loop
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loop:
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%a = phi ptr [ %arg, %entry ], [ %b, %loop ]
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%b = load ptr, ptr %mem, align 8
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call void @foo(ptr %a)
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callbr void asm sideeffect "", "*m,!i"(ptr elementtype(i8) %b)
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to label %end [label %loop]
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end:
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ret void
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}
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