eece6ba283
AMDGPU has native instructions and target intrinsics for this, but these really should be subject to legalization and generic optimizations. This will enable legalization of f16->f32 on targets without f16 support. Implement a somewhat horrible inline expansion for targets without libcall support. This could be better if we could introduce control flow (GlobalISel version not yet implemented). Support for strictfp legalization is less complete but works for the simple cases.
76 lines
3.5 KiB
LLVM
76 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
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; XUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
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; FIXME: Expansion support without libcalls
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; FIXME: Implement f16->f32 promotion for strictfp
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; define half @test_strict_ldexp_f16_i32(ptr addrspace(1) %out, half %a, i32 %b) #2 {
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; %result = call half @llvm.experimental.constrained.ldexp.f16.i32(half %a, i32 %b, metadata !"round.dynamic", metadata !"fpexcept.strict")
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; ret half %result
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; }
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define float @test_strict_ldexp_f32_i32(ptr addrspace(1) %out, float %a, i32 %b) #2 {
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; X64-LABEL: test_strict_ldexp_f32_i32:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: movl %esi, %edi
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; X64-NEXT: callq ldexpf@PLT
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; X64-NEXT: popq %rax
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%result = call float @llvm.experimental.constrained.ldexp.f32.i32(float %a, i32 %b, metadata !"round.dynamic", metadata !"fpexcept.strict")
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ret float %result
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}
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define double @test_strict_ldexp_f64_i32(ptr addrspace(1) %out, double %a, i32 %b) #2 {
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; X64-LABEL: test_strict_ldexp_f64_i32:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: movl %esi, %edi
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; X64-NEXT: callq ldexp@PLT
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; X64-NEXT: popq %rax
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%result = call double @llvm.experimental.constrained.ldexp.f64.i32(double %a, i32 %b, metadata !"round.dynamic", metadata !"fpexcept.strict")
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ret double %result
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}
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define <2 x float> @test_strict_ldexp_v2f32_v2i32(ptr addrspace(1) %out, <2 x float> %a, <2 x i32> %b) #2 {
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; X64-LABEL: test_strict_ldexp_v2f32_v2i32:
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; X64: # %bb.0:
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; X64-NEXT: subq $56, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 64
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; X64-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; X64-NEXT: movd %xmm1, %edi
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; X64-NEXT: callq ldexpf@PLT
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; X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; X64-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
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; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
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; X64-NEXT: pshufd $85, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
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; X64-NEXT: # xmm1 = mem[1,1,1,1]
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; X64-NEXT: movd %xmm1, %edi
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; X64-NEXT: callq ldexpf@PLT
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; X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
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; X64-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; X64-NEXT: movaps %xmm1, %xmm0
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; X64-NEXT: addq $56, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%result = call <2 x float> @llvm.experimental.constrained.ldexp.v2f32.v2i32(<2 x float> %a, <2 x i32> %b, metadata !"round.dynamic", metadata !"fpexcept.strict")
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ret <2 x float> %result
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}
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declare half @llvm.experimental.constrained.ldexp.f16.i32(half, i32, metadata, metadata) #1
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declare float @llvm.experimental.constrained.ldexp.f32.i32(float, i32, metadata, metadata) #1
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declare double @llvm.experimental.constrained.ldexp.f64.i32(double, i32, metadata, metadata) #1
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declare x86_fp80 @llvm.experimental.constrained.ldexp.f80.i32(x86_fp80, i32, metadata, metadata) #1
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declare <2 x float> @llvm.experimental.constrained.ldexp.v2f32.v2i32(<2 x float>, <2 x i32>, metadata, metadata) #1
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attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
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attributes #2 = { strictfp }
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