d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
21 lines
793 B
YAML
21 lines
793 B
YAML
# RUN: llc -mtriple=i686-- -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
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---
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# Test that machine copy propagation ignores DBG_VALUE and DBL_VALUE_LIST and updates it.
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# CHECK-LABEL: name: foo
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# CHECK: bb.0:
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# CHECK-NEXT: $rax = MOV64ri 31
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# CHECK-NEXT: DBG_VALUE $rax
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# CHECK-NEXT: DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rax, 0, 0
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# CHECK-NEXT: RET64 implicit killed $rax
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name: foo
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body: |
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bb.0:
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renamable $rcx = MOV64ri 31
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DBG_VALUE $rcx, 0, 0, 0, 0
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DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rcx, 0, 0
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$rax = COPY killed renamable $rcx
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RET64 implicit killed $rax
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...
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