bb28442c0b
Previously, tail jump pseudo-opcodes were skipped by the `encodeInstruction()` call inside `X86AsmPrinter::LowerPATCHABLE_OP`. This caused emission of a 2-byte NOP and dropping of the tail jump. With this PR, we change `PATCHABLE_OP` to not wrap the first `MachineInstr` anymore, but inserting itself before, leaving the instruction unaltered. At lowering time in `X86AsmPrinter`, we now "look ahead" for the next non-pseudo `MachineInstr` and lower+encode it, to inspect its size. If the size is below what `PATCHABLE_OP` expects, it inserts NOPs; otherwise it does nothing. That way, now the first `MachineInstr` is always lowered as usual even if `"patchable-function"="prologue-short-redirect"` is used. Fixes https://github.com/llvm/llvm-project/issues/76879, https://github.com/llvm/llvm-project/issues/76958 and https://github.com/llvm/llvm-project/issues/59039
35 lines
970 B
LLVM
35 lines
970 B
LLVM
; RUN: llc -verify-machineinstrs -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
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; CHECK: f1:
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: jmp f0 # TAILCALL
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; CHECK: f2:
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: jmp malloc # TAILCALL
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define ptr @f1(i64 %count) "patchable-function"="prologue-short-redirect" {
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entry:
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%call = tail call ptr @f0(i64 %count)
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ret ptr %call
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}
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declare ptr @f0(i64)
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define noalias ptr @f2(i64 %count) "patchable-function"="prologue-short-redirect" {
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entry:
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%call = tail call ptr @malloc(i64 %count)
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ret ptr %call
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}
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declare noalias ptr @malloc(i64) #0
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attributes #0 = { allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" }
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!llvm.module.flags = !{!0, !1, !2, !3}
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!0 = !{i32 1, !"wchar_size", i32 2}
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!1 = !{i32 8, !"PIC Level", i32 2}
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!2 = !{i32 7, !"uwtable", i32 2}
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!3 = !{i32 1, !"MaxTLSAlign", i32 65536}
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