ec1af63dde
This fixes an edge case where functions starting with inline assembly would assert while trying to lower that inline asm instruction. After this PR, for now we always add a no-op (xchgw in this case) without considering the size of the next inline asm instruction. We might want to revisit this in the future. This fixes Unreal Engine 5.3.2 compilation with clang-cl and /HOTPATCH. Should close https://github.com/llvm/llvm-project/issues/56234
213 lines
6.0 KiB
LLVM
213 lines
6.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -filetype=obj -o - -mtriple=x86_64-apple-macosx < %s | llvm-objdump --no-print-imm-hex --triple=x86_64-apple-macosx -d - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx < %s | FileCheck %s --check-prefix=CHECK-ALIGN
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; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=32,32CFI,XCHG
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; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=32,MOV
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; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=32,MOV
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; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=32,XCHG
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; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=64
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declare void @callee(ptr)
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define void @f0() "patchable-function"="prologue-short-redirect" {
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; CHECK-LABEL: _f0{{>?}}:
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; CHECK-NEXT: 66 90 nop
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _f0:
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; 32: f0:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
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; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
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; 32-NEXT: retl
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; 64: f0:
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
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; 64-NEXT: retq
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ret void
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}
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define void @f1() "patchable-function"="prologue-short-redirect" "frame-pointer"="all" {
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; CHECK-LABEL: _f1
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; CHECK-NEXT: 66 90 nop
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; CHECK-NEXT: 55 pushq %rbp
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _f1:
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; 32: f1:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
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; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
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; 32-NEXT: pushl %ebp
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; 64: f1:
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; 64-NEXT: .seh_proc f1
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax
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; 64-NEXT: pushq %rbp
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ret void
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}
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define void @f2() "patchable-function"="prologue-short-redirect" {
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; CHECK-LABEL: _f2
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; CHECK-NEXT: 48 81 ec a8 00 00 00 subq $168, %rsp
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _f2:
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; 32: f2:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
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; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
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; 32-NEXT: pushl %ebp
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; 64: f2:
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; 64-NEXT: .seh_proc f2
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; 64-NEXT: # %bb.0:
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; 64-NEXT: subq $200, %rsp
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%ptr = alloca i64, i32 20
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call void @callee(ptr %ptr)
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ret void
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}
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define void @f3() "patchable-function"="prologue-short-redirect" optsize {
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; CHECK-LABEL: _f3
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; CHECK-NEXT: 66 90 nop
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _f3:
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; 32: f3:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax
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; MOV-NEXT: movl %edi, %edi
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; 32-NEXT: retl
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; 64: f3:
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax
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; 64-NEXT: retq
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ret void
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}
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; This testcase happens to produce a KILL instruction at the beginning of the
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; first basic block. In this case the 2nd instruction should be turned into a
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; patchable one.
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; CHECK-LABEL: f4{{>?}}:
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; CHECK-NEXT: 8b 0c 37 movl (%rdi,%rsi), %ecx
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; 32: f4:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax
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; MOV-NEXT: movl %edi, %edi
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; 32-NEXT: pushl %ebx
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; 64: f4:
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; 64-NEXT: # %bb.0:
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; 64-NOT: xchgw %ax, %ax
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define i32 @f4(ptr %arg1, i64 %arg2, i32 %arg3) "patchable-function"="prologue-short-redirect" {
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bb:
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%tmp10 = getelementptr i8, ptr %arg1, i64 %arg2
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%tmp12 = load i32, ptr %tmp10, align 4
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fence acquire
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%tmp13 = add i32 %tmp12, %arg3
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%tmp14 = cmpxchg ptr %tmp10, i32 %tmp12, i32 %tmp13 seq_cst monotonic
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%tmp15 = extractvalue { i32, i1 } %tmp14, 1
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br i1 %tmp15, label %bb21, label %bb16
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bb16:
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br label %bb21
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bb21:
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%tmp22 = phi i32 [ %tmp12, %bb ], [ %arg3, %bb16 ]
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ret i32 %tmp22
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}
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; This testcase produces an empty function (not even a ret on some targets).
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; This scenario can happen with undefined behavior.
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; Ensure that the "patchable-function" pass supports this case.
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; CHECK-LABEL: _emptyfunc
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; CHECK-NEXT: 0f 0b ud2
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _emptyfunc:
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; 32: emptyfunc:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax
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; MOV-NEXT: movl %edi, %edi
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; 64: emptyfunc:
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax
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; From code: int emptyfunc() {}
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define i32 @emptyfunc() "patchable-function"="prologue-short-redirect" {
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unreachable
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}
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; Hotpatch feature must ensure no jump within the function goes to the first instruction.
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; From code:
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; void jmp_to_start(char *b) {
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; do {
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; } while ((++(*b++)));
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; }
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; CHECK-ALIGN: .p2align 4, 0x90
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; CHECK-ALIGN: _jmp_to_start:
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; 32: jmp_to_start:
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; 32CFI-NEXT: .cfi_startproc
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; 32-NEXT: # %bb.0:
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; XCHG-NEXT: xchgw %ax, %ax
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; MOV-NEXT: movl %edi, %edi
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; 64: jmp_to_start:
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax
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define dso_local void @jmp_to_start(ptr inreg nocapture noundef %b) "patchable-function"="prologue-short-redirect" {
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entry:
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br label %do.body
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi ptr [ %b, %entry ], [ %incdec.ptr, %do.body ]
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%incdec.ptr = getelementptr inbounds i8, ptr %b.addr.0, i64 1
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%0 = load i8, ptr %b.addr.0, align 1
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%inc = add i8 %0, 1
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store i8 %inc, ptr %b.addr.0, align 1
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%tobool.not = icmp eq i8 %inc, 0
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br i1 %tobool.not, label %do.end, label %do.body
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do.end: ; preds = %do.body
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ret void
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}
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; Test that inline asm is properly hotpatched. We currently don't examine the
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; asm instruction when printing it, thus we always emit patching NOPs.
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; 64: inline_asm:
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; 64-NEXT: # %bb.0:
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; 64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
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; 64-NEXT: #APP
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; 64-NEXT: int3 # encoding: [0xcc]
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; 64-NEXT: #NO_APP
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define dso_local void @inline_asm() "patchable-function"="prologue-short-redirect" {
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entry:
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call void asm sideeffect "int3", "~{dirflag},~{fpsr},~{flags}"()
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ret void
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}
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