ee5585ed09
Improve and enable folding of conditional branches with tail calls. 1. Make it so that conditional tail calls can be emitted even when there are multiple predecessors. 2. Don't guard the transformation behind -Os. The rationale for guarding it was static-prediction can be affected by whether the branch is forward of backward. This is no longer true for almost any X86 cpus (anything newer than `SnB`) so is no longer a meaningful concern. Reviewed By: pengfei Differential Revision: https://reviews.llvm.org/D140931
298 lines
6.9 KiB
LLVM
298 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt,+lzcnt | FileCheck %s
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declare dso_local void @foo(i32)
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declare dso_local void @foo32(i32)
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declare dso_local void @foo64(i64)
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define void @neg(i32 %x) nounwind {
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; CHECK-LABEL: neg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: negl %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%sub = sub i32 0, %x
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%cmp = icmp eq i32 %sub, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %sub)
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br label %return
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return:
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ret void
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}
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define void @sar(i32 %x) nounwind {
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; CHECK-LABEL: sar:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sarl %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%ashr = ashr i32 %x, 1
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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define void @shr(i32 %x) nounwind {
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; CHECK-LABEL: shr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shrl %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%ashr = lshr i32 %x, 1
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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define void @shri(i32 %x) nounwind {
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; CHECK-LABEL: shri:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shrl $3, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%ashr = lshr i32 %x, 3
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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define void @shl(i32 %x) nounwind {
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; CHECK-LABEL: shl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addl %edi, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%shl = shl i32 %x, 1
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%cmp = icmp eq i32 %shl, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %shl)
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br label %return
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return:
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ret void
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}
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define void @shli(i32 %x) nounwind {
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; CHECK-LABEL: shli:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shll $4, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%shl = shl i32 %x, 4
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%cmp = icmp eq i32 %shl, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %shl)
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br label %return
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return:
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ret void
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}
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define zeroext i1 @adc(i128 %x) nounwind {
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; CHECK-LABEL: adc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; CHECK-NEXT: addq %rdi, %rax
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; CHECK-NEXT: adcq $0, %rsi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%add = add i128 %x, 9223372036854775808
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%cmp = icmp ult i128 %add, 18446744073709551616
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ret i1 %cmp
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}
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define zeroext i1 @sbb(i128 %x, i128 %y) nounwind {
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; CHECK-LABEL: sbb:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq %rdx, %rdi
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; CHECK-NEXT: sbbq %rcx, %rsi
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; CHECK-NEXT: setns %al
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; CHECK-NEXT: retq
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%sub = sub i128 %x, %y
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%cmp = icmp sge i128 %sub, 0
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ret i1 %cmp
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}
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define void @andn(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: andn:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andnl %esi, %edi, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%not = xor i32 %x, -1
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%andn = and i32 %y, %not
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%cmp = icmp eq i32 %andn, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %andn)
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br label %return
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return:
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ret void
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}
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declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone
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define void @bextr(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: bextr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: bextrl %esi, %edi, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%bextr = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)
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%cmp = icmp eq i32 %bextr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %bextr)
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br label %return
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return:
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ret void
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}
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declare i32 @llvm.ctpop.i32(i32) nounwind readnone
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define void @popcnt(i32 %x) nounwind {
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; CHECK-LABEL: popcnt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: popcntl %edi, %edi
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; CHECK-NEXT: jne foo # TAILCALL
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; CHECK-NEXT: # %bb.1: # %return
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; CHECK-NEXT: retq
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%popcnt = tail call i32 @llvm.ctpop.i32(i32 %x)
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%cmp = icmp eq i32 %popcnt, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %popcnt)
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br label %return
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return:
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ret void
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}
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declare i64 @llvm.cttz.i64(i64, i1)
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define i64 @testCTZ(i64 %v) nounwind {
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; CHECK-LABEL: testCTZ:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tzcntq %rdi, %rcx
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; CHECK-NEXT: movl $255, %eax
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; CHECK-NEXT: cmovaeq %rcx, %rax
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; CHECK-NEXT: retq
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%cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true)
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%tobool = icmp eq i64 %v, 0
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%cond = select i1 %tobool, i64 255, i64 %cnt
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ret i64 %cond
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}
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declare i32 @llvm.cttz.i32(i32, i1)
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define void @testCTZ2(i32 %v) nounwind {
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; CHECK-LABEL: testCTZ2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: tzcntl %edi, %ebx
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; CHECK-NEXT: jb .LBB12_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: .LBB12_2: # %return
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: jmp foo32 # TAILCALL
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%cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
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%cmp = icmp eq i32 %v, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %cnt)
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br label %return
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return:
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tail call void @foo32(i32 %cnt)
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ret void
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}
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define void @testCTZ3(i32 %v) nounwind {
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; CHECK-LABEL: testCTZ3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: tzcntl %edi, %ebx
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; CHECK-NEXT: jae .LBB13_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: .LBB13_2: # %return
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: jmp foo32 # TAILCALL
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%cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
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%cmp = icmp ne i32 %v, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %cnt)
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br label %return
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return:
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tail call void @foo32(i32 %cnt)
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ret void
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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define i64 @testCLZ(i64 %v) nounwind {
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; CHECK-LABEL: testCLZ:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lzcntq %rdi, %rcx
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; CHECK-NEXT: movl $255, %eax
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; CHECK-NEXT: cmovaeq %rcx, %rax
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; CHECK-NEXT: retq
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%cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
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%tobool = icmp ne i64 %v, 0
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%cond = select i1 %tobool, i64 %cnt, i64 255
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ret i64 %cond
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}
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declare i64 @llvm.ctpop.i64(i64)
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define i64 @testPOPCNT(i64 %v) nounwind {
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; CHECK-LABEL: testPOPCNT:
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; CHECK: # %bb.0:
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; CHECK-NEXT: popcntq %rdi, %rcx
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; CHECK-NEXT: movl $255, %eax
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; CHECK-NEXT: cmovneq %rcx, %rax
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; CHECK-NEXT: retq
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%cnt = tail call i64 @llvm.ctpop.i64(i64 %v)
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%tobool = icmp ne i64 %v, 0
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%cond = select i1 %tobool, i64 %cnt, i64 255
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ret i64 %cond
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}
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