2f448bf509
Test updates were performed using: https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34 These are only the test updates where the test passed without further modification (which is almost all of them, as the backend is largely pointer-type agnostic).
44 lines
1.6 KiB
LLVM
44 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
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; rdar://11897677
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;CHECK-LABEL: intrin_pmov:
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;CHECK: pmovzxbw (%{{.*}}), %xmm0
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;CHECK-NEXT: movdqu
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;CHECK-NEXT: ret
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define void @intrin_pmov(ptr noalias %dest, ptr noalias %src) nounwind uwtable ssp {
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%1 = load <2 x i64>, ptr %src, align 16
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%2 = bitcast <2 x i64> %1 to <16 x i8>
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%3 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %2) nounwind
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%4 = bitcast <8 x i16> %3 to <16 x i8>
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tail call void @llvm.x86.sse2.storeu.dq(ptr %dest, <16 x i8> %4) nounwind
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ret void
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}
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declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone
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declare void @llvm.x86.sse2.storeu.dq(ptr, <16 x i8>) nounwind
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; rdar://15245794
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define <4 x i32> @foo0(double %v.coerce) nounwind ssp {
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; CHECK-LABEL: foo0
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; CHECK: pmovzxwd %xmm0, %xmm0
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; CHECK-NEXT: ret
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%tmp = bitcast double %v.coerce to <4 x i16>
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%tmp1 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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%tmp2 = tail call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp1) nounwind
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ret <4 x i32> %tmp2
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}
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define <8 x i16> @foo1(double %v.coerce) nounwind ssp {
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; CHECK-LABEL: foo1
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; CHECK: pmovzxbw %xmm0, %xmm0
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; CHECK-NEXT: ret
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%tmp = bitcast double %v.coerce to <8 x i8>
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%tmp1 = shufflevector <8 x i8> %tmp, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%tmp2 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %tmp1)
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ret <8 x i16> %tmp2
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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