Files
clang-p2996/llvm/test/CodeGen/X86/pr16031.ll
Amaury Séchet d7600c7ccb [DAG] select Cond, C, -1 --> or (sext (not Cond)), C when C is MVT::i1
In the spirit of D130765 . Get rid of cbranches and/or cmov. Usually shorter, but sometime not, becaus eit's hard to prededict when dependency breaking xor will be introduced.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D134736
2022-09-30 00:36:58 +00:00

29 lines
919 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
define i64 @main(i1 %tobool1) nounwind {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: decl %eax
; CHECK-NEXT: orl $-12, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: addl $-1, %edx
; CHECK-NEXT: movl $0, %edx
; CHECK-NEXT: adcl $-2, %edx
; CHECK-NEXT: cmovsl %ecx, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: retl
entry:
%0 = zext i1 %tobool1 to i32
%. = xor i32 %0, 1
%.21 = select i1 %tobool1, i32 -12, i32 -1
%conv = sext i32 %.21 to i64
%1 = add i64 %conv, -1
%cmp10 = icmp slt i64 %1, 0
%sub17 = select i1 %cmp10, i64 0, i64 %conv
ret i64 %sub17
}