40a50f8701
This is effectively inverting the transform added with D116804 because the downside of the false dependency of something like "sbb %eax, %eax" is much greater than the upside of eliminating a zeroing instruction on (all?) Intel CPUs. Differential Revision: https://reviews.llvm.org/D118843
35 lines
1.4 KiB
LLVM
35 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Check the attribute.
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; RUN: llc < %s -mtriple=x86_64-- -mattr=-sbb-dep-breaking | FileCheck %s --check-prefixes=ZERO
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sbb-dep-breaking | FileCheck %s --check-prefixes=IDIOM
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; And check that CPUs have included the attribute as expected.
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=ZERO
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=ZERO
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=ZERO
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s --check-prefixes=IDIOM
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=IDIOM
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=IDIOM
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=IDIOM
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define i32 @i32_select_0_or_neg1(i32 %x) {
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; ZERO-LABEL: i32_select_0_or_neg1:
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; ZERO: # %bb.0:
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; ZERO-NEXT: xorl %eax, %eax
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; ZERO-NEXT: negl %edi
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; ZERO-NEXT: sbbl %eax, %eax
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; ZERO-NEXT: retq
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;
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; IDIOM-LABEL: i32_select_0_or_neg1:
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; IDIOM: # %bb.0:
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; IDIOM-NEXT: negl %edi
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; IDIOM-NEXT: sbbl %eax, %eax
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; IDIOM-NEXT: retq
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%cmp = icmp ne i32 %x, 0
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%sel = select i1 %cmp, i32 -1, i32 0
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ret i32 %sel
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}
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