e6b85c3027
Followup to D59363 which failed to handle the icmp(X,undef) -> isTrueWhenEqual case - similar to llvm::ConstantFoldCompareInstruction
As discussed on the review, this is affecting some previously reduced test cases, but will also prevent reductions from relying on this inconsistent behaviour in the future.
Reapplied after reversion at e1e3c75c7d with a tweak to the pseudo-probe-peep.ll test
Differential Revision: https://reviews.llvm.org/D158068
166 lines
5.0 KiB
LLVM
166 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s
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;; X's live range extends beyond the shift, so the register allocator
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;; cannot coalesce it with Y. Because of this, a copy needs to be
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;; emitted before the shift to save the register value before it is
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;; clobbered. However, this copy is not needed if the register
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;; allocator turns the shift into an LEA. This also occurs for ADD.
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; Check that the shift gets turned into an LEA.
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@G = external global i32
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define i32 @test1(i32 %X) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: leal 1(%rax), %ecx
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; CHECK-NEXT: movq _G@GOTPCREL(%rip), %rdx
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; CHECK-NEXT: movl %ecx, (%rdx)
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; CHECK-NEXT: ## kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: retq
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%Z = add i32 %X, 1
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store volatile i32 %Z, ptr @G
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ret i32 %X
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}
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; rdar://8977508
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; The second add should not be transformed to leal nor should it be
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; commutted (which would require inserting a copy).
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define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ## kill: def $ecx killed $ecx def $rcx
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; CHECK-NEXT: ## kill: def $edx killed $edx def $rdx
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; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: addl %edi, %esi
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; CHECK-NEXT: leal (%rdx,%rcx), %eax
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; CHECK-NEXT: addl %esi, %eax
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; CHECK-NEXT: retq
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entry:
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%add = add i32 %b, %a
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%add3 = add i32 %add, %c
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%add5 = add i32 %add3, %d
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ret i32 %add5
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}
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; rdar://9002648
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define i64 @test3(i64 %x) nounwind readnone ssp {
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; CHECK-LABEL: test3:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: leaq (%rdi,%rdi), %rax
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; CHECK-NEXT: retq
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entry:
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%0 = shl i64 %x, 1
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ret i64 %0
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}
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@global = external global i32, align 4
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@global2 = external global i64, align 8
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; Test that liveness is properly updated and we do not encounter the
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; assert/crash from http://llvm.org/PR28301
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define void @ham() {
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; CHECK-LABEL: ham:
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; CHECK: ## %bb.0: ## %bb
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: movq _global@GOTPCREL(%rip), %rdx
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; CHECK-NEXT: movq _global2@GOTPCREL(%rip), %rsi
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %cl, %cl
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; CHECK-NEXT: je LBB3_2
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB3_6: ## %bb2
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; CHECK-NEXT: ## =>This Loop Header: Depth=1
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; CHECK-NEXT: ## Child Loop BB3_7 Depth 2
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; CHECK-NEXT: movl (%rdx), %edi
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; CHECK-NEXT: leal (%rdi,%rax), %r8d
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; CHECK-NEXT: movslq %r8d, %r8
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB3_7: ## %bb6
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; CHECK-NEXT: ## Parent Loop BB3_6 Depth=1
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; CHECK-NEXT: ## => This Inner Loop Header: Depth=2
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; CHECK-NEXT: movq %rax, (%rsi)
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; CHECK-NEXT: movq %r8, (%rsi)
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; CHECK-NEXT: movl %edi, (%rdx)
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; CHECK-NEXT: testb %cl, %cl
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; CHECK-NEXT: jne LBB3_7
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; CHECK-NEXT: ## %bb.8: ## %bb9
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; CHECK-NEXT: ## in Loop: Header=BB3_6 Depth=1
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; CHECK-NEXT: addq $4, %rax
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; CHECK-NEXT: testb %cl, %cl
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; CHECK-NEXT: jne LBB3_6
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; CHECK-NEXT: LBB3_2: ## %bb3.preheader
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB3_3: ## %bb3
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; CHECK-NEXT: ## =>This Loop Header: Depth=1
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; CHECK-NEXT: ## Child Loop BB3_4 Depth 2
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; CHECK-NEXT: movq %rcx, %rdx
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; CHECK-NEXT: addq $4, %rcx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: subl %edx, %esi
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB3_4: ## %bb4
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; CHECK-NEXT: ## Parent Loop BB3_3 Depth=1
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; CHECK-NEXT: ## => This Inner Loop Header: Depth=2
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; CHECK-NEXT: testl %esi, %esi
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; CHECK-NEXT: jne LBB3_9
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; CHECK-NEXT: ## %bb.5: ## %bb5
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; CHECK-NEXT: ## in Loop: Header=BB3_4 Depth=2
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; CHECK-NEXT: incq %rdx
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; CHECK-NEXT: cmpq %rcx, %rdx
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; CHECK-NEXT: jl LBB3_4
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; CHECK-NEXT: jmp LBB3_3
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; CHECK-NEXT: LBB3_9: ## %bb8
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; CHECK-NEXT: ud2
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bb:
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br label %bb1
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bb1:
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%tmp = phi i64 [ %tmp40, %bb9 ], [ 0, %bb ]
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%tmp2 = phi i32 [ %tmp39, %bb9 ], [ 0, %bb ]
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%tmp3 = icmp sgt i32 undef, 10
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br i1 %tmp3, label %bb2, label %bb3
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bb2:
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%tmp6 = load i32, ptr @global, align 4
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%tmp8 = add nsw i32 %tmp6, %tmp2
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%tmp9 = sext i32 %tmp8 to i64
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br label %bb6
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bb3:
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%tmp14 = phi i64 [ %tmp15, %bb5 ], [ 0, %bb1 ]
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%tmp15 = add nuw i64 %tmp14, 4
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%tmp16 = trunc i64 %tmp14 to i32
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%tmp17 = sub i32 %tmp2, %tmp16
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br label %bb4
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bb4:
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%tmp20 = phi i64 [ %tmp14, %bb3 ], [ %tmp34, %bb5 ]
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%tmp28 = icmp eq i32 %tmp17, 0
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br i1 %tmp28, label %bb5, label %bb8
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bb5:
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%tmp34 = add nuw nsw i64 %tmp20, 1
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%tmp35 = icmp slt i64 %tmp34, %tmp15
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br i1 %tmp35, label %bb4, label %bb3
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bb6:
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store volatile i64 %tmp, ptr @global2, align 8
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store volatile i64 %tmp9, ptr @global2, align 8
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store volatile i32 %tmp6, ptr @global, align 4
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%tmp45 = icmp slt i32 undef, undef
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br i1 %tmp45, label %bb6, label %bb9
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bb8:
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unreachable
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bb9:
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%tmp39 = add nuw nsw i32 %tmp2, 4
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%tmp40 = add nuw i64 %tmp, 4
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br label %bb1
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}
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