b799e9dafa
The DXContainer pipeline state information encodes a bunch of mask vectors that are used to track things about the inputs and outputs from each shader. This adds support for reading and writing them throught he YAML test interfaces. The writing logic in MC is extremely primitive and we'll want to revisit the API for that, but since I'm not sure how we'll want to generate the mask bits from DXIL during code generation I didn't want to spend too much time on the API. Fixes #59479
175 lines
5.2 KiB
YAML
175 lines
5.2 KiB
YAML
# RUN: yaml2obj %s | obj2yaml | FileCheck %s
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--- !dxcontainer
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Header:
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Hash: [ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ]
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Version:
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Major: 1
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Minor: 0
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FileSize: 3836
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PartCount: 7
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PartOffsets: [ 60, 76, 204, 292, 584, 2092, 2120 ]
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Parts:
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- Name: SFI0
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Size: 8
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Flags:
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Doubles: false
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ComputeShadersPlusRawAndStructuredBuffers: false
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UAVsAtEveryStage: false
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Max64UAVs: false
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MinimumPrecision: false
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DX11_1_DoubleExtensions: false
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DX11_1_ShaderExtensions: false
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LEVEL9ComparisonFiltering: false
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TiledResources: false
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StencilRef: false
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InnerCoverage: false
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TypedUAVLoadAdditionalFormats: false
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ROVs: false
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ViewportAndRTArrayIndexFromAnyShaderFeedingRasterizer: false
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WaveOps: false
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Int64Ops: false
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ViewID: true
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Barycentrics: false
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NativeLowPrecision: false
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ShadingRate: false
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Raytracing_Tier_1_1: false
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SamplerFeedback: false
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AtomicInt64OnTypedResource: false
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AtomicInt64OnGroupShared: false
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DerivativesInMeshAndAmpShaders: false
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ResourceDescriptorHeapIndexing: false
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SamplerDescriptorHeapIndexing: false
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RESERVED: false
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AtomicInt64OnHeapResource: false
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AdvancedTextureOps: false
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WriteableMSAATextures: false
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NextUnusedBit: false
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- Name: ISG1
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Size: 120
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- Name: OSG1
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Size: 80
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- Name: PSV0
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Size: 284
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PSVInfo:
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Version: 2
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ShaderStage: 2
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InputPrimitive: 3
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OutputTopology: 1
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OutputStreamMask: 3
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OutputPositionPresent: 0
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MinimumWaveLaneCount: 0
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MaximumWaveLaneCount: 4294967295
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UsesViewID: 1
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MaxVertexCount: 3
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SigInputVectors: 3
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SigOutputVectors: [ 1, 1, 0, 0 ]
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NumThreadsX: 0
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NumThreadsY: 0
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NumThreadsZ: 0
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ResourceStride: 24
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Resources: []
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SigInputElements:
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- Name: ''
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Indices: [ 0 ]
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StartRow: 0
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Cols: 4
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StartCol: 0
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Allocated: true
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Kind: Position
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ComponentType: Float32
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Interpolation: LinearNoperspective
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DynamicMask: 0x0
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Stream: 0
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- Name: AAA
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Indices: [ 2 ]
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StartRow: 1
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Cols: 2
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StartCol: 0
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Allocated: true
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Kind: Arbitrary
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ComponentType: Float32
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Interpolation: Linear
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DynamicMask: 0x0
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Stream: 0
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- Name: AAA
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Indices: [ 3 ]
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StartRow: 2
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Cols: 4
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StartCol: 0
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Allocated: true
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Kind: Arbitrary
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ComponentType: Float32
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Interpolation: Linear
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DynamicMask: 0x0
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Stream: 0
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SigOutputElements:
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- Name: BBB
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Indices: [ 0 ]
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StartRow: 0
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Cols: 4
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StartCol: 0
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Allocated: true
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Kind: Arbitrary
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ComponentType: Float32
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Interpolation: Linear
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DynamicMask: 0x0
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Stream: 0
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- Name: CCC
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Indices: [ 0 ]
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StartRow: 0
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Cols: 4
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StartCol: 0
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Allocated: true
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Kind: Arbitrary
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ComponentType: Float32
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Interpolation: Linear
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DynamicMask: 0x0
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Stream: 1
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SigPatchOrPrimElements: []
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OutputVectorMasks:
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- [ 0xE ]
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- [ 0x5 ]
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- [ ]
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- [ ]
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InputOutputMap:
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- [ 0x2, 0x4, 0x8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ]
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- [ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x2, 0x4, 0x8 ]
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- [ ]
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- [ ]
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- Name: STAT
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Size: 1500
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- Name: HASH
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Size: 20
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Hash:
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IncludesSource: false
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Digest: [ 0x10, 0xA2, 0x84, 0xA5, 0x76, 0xA6, 0x28, 0x82,
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0x21, 0x39, 0x1, 0xE0, 0x53, 0x19, 0xBE, 0x79 ]
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- Name: DXIL
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Size: 24
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Program:
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MajorVersion: 6
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MinorVersion: 1
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ShaderKind: 2
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Size: 6
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DXILMajorVersion: 1
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DXILMinorVersion: 1
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DXILSize: 0
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...
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# Verify the vector sizes.
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# CHECK: SigInputVectors: 3
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# CHECK-NEXT: SigOutputVectors: [ 1, 1, 0, 0 ]
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# Verify the vector mask encodings.
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# CHECK: OutputVectorMasks:
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# CHECK-NEXT: - [ 0xE ]
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# CHECK-NEXT: - [ 0x5 ]
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# CHECK-NEXT: - [ ]
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# CHECK-NEXT: - [ ]
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# CHECK-NEXT: InputOutputMap:
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# CHECK-NEXT: - [ 0x2, 0x4, 0x8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ]
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# CHECK-NEXT: - [ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x2, 0x4, 0x8 ]
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# CHECK-NEXT: - [ ]
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# CHECK-NEXT: - [ ]
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