3f8027fb67
This updates transform test cases for ADCE AddDiscriminators AggressiveInstCombine AlignmentFromAssumptions ArgumentPromotion BDCE CalledValuePropagation DCE Reg2Mem WholeProgramDevirt to use the -passes syntax when specifying the pipeline. Given that LLVM_ENABLE_NEW_PASS_MANAGER isn't set to off (which is a deprecated feature) the updated test cases already used the new pass manager, but they were using the legacy syntax when specifying the passes to run. This patch can be seen as a step toward deprecating that interface. This patch also removes some redundant RUN lines. Here I am referring to test cases that had multiple RUN lines verifying both the legacy "-passname" syntax and the new "-passes=passname" syntax. Since we switched the default pass manager to "new PM" both RUN lines have verified the new PM version of the pass (more or less wasting time running the same test twice), unless LLVM_ENABLE_NEW_PASS_MANAGER is set to "off". It is assumed that it is enough to run these tests with the new pass manager now. Differential Revision: https://reviews.llvm.org/D108472
194 lines
7.9 KiB
LLVM
194 lines
7.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
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;int popcount8(unsigned char i) {
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; i = i - ((i >> 1) & 0x55);
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; i = (i & 0x33) + ((i >> 2) & 0x33);
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; i = ((i + (i >> 4)) & 0x0F);
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; return (i * 0x01010101);
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;}
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define signext i32 @popcount8(i8 zeroext %0) {
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; CHECK-LABEL: @popcount8(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP0:%.*]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 85
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; CHECK-NEXT: [[TMP4:%.*]] = sub i8 [[TMP0]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], 51
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; CHECK-NEXT: [[TMP6:%.*]] = lshr i8 [[TMP4]], 2
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; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 51
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; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i8 [[TMP7]], [[TMP5]]
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; CHECK-NEXT: [[TMP9:%.*]] = lshr i8 [[TMP8]], 4
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; CHECK-NEXT: [[TMP10:%.*]] = add nuw nsw i8 [[TMP9]], [[TMP8]]
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; CHECK-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 15
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; CHECK-NEXT: [[TMP12:%.*]] = zext i8 [[TMP11]] to i32
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; CHECK-NEXT: ret i32 [[TMP12]]
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;
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%2 = lshr i8 %0, 1
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%3 = and i8 %2, 85
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%4 = sub i8 %0, %3
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%5 = and i8 %4, 51
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%6 = lshr i8 %4, 2
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%7 = and i8 %6, 51
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%8 = add nuw nsw i8 %7, %5
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%9 = lshr i8 %8, 4
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%10 = add nuw nsw i8 %9, %8
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%11 = and i8 %10, 15
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%12 = zext i8 %11 to i32
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ret i32 %12
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}
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;int popcount32(unsigned i) {
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; i = i - ((i >> 1) & 0x55555555);
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; i = (i & 0x33333333) + ((i >> 2) & 0x33333333);
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; i = ((i + (i >> 4)) & 0x0F0F0F0F);
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; return (i * 0x01010101) >> 24;
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;}
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define signext i32 @popcount32(i32 zeroext %0) {
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; CHECK-LABEL: @popcount32(
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP0:%.*]])
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = lshr i32 %0, 1
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%3 = and i32 %2, 1431655765
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%4 = sub i32 %0, %3
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%5 = and i32 %4, 858993459
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%6 = lshr i32 %4, 2
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%7 = and i32 %6, 858993459
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%8 = add nuw nsw i32 %7, %5
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%9 = lshr i32 %8, 4
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%10 = add nuw nsw i32 %9, %8
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%11 = and i32 %10, 252645135
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%12 = mul i32 %11, 16843009
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%13 = lshr i32 %12, 24
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ret i32 %13
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}
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;int popcount64(unsigned long long i) {
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; i = i - ((i >> 1) & 0x5555555555555555);
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; i = (i & 0x3333333333333333) + ((i >> 2) & 0x3333333333333333);
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; i = ((i + (i >> 4)) & 0x0F0F0F0F0F0F0F0F);
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; return (i * 0x0101010101010101) >> 56;
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;}
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define signext i32 @popcount64(i64 %0) {
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; CHECK-LABEL: @popcount64(
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.ctpop.i64(i64 [[TMP0:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
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; CHECK-NEXT: ret i32 [[TMP3]]
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;
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%2 = lshr i64 %0, 1
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%3 = and i64 %2, 6148914691236517205
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%4 = sub i64 %0, %3
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%5 = and i64 %4, 3689348814741910323
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%6 = lshr i64 %4, 2
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%7 = and i64 %6, 3689348814741910323
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%8 = add nuw nsw i64 %7, %5
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%9 = lshr i64 %8, 4
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%10 = add nuw nsw i64 %9, %8
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%11 = and i64 %10, 1085102592571150095
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%12 = mul i64 %11, 72340172838076673
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%13 = lshr i64 %12, 56
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%14 = trunc i64 %13 to i32
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ret i32 %14
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}
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;int popcount128(__uint128_t i) {
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; __uint128_t x = 0x5555555555555555;
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; x <<= 64;
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; x |= 0x5555555555555555;
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; __uint128_t y = 0x3333333333333333;
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; y <<= 64;
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; y |= 0x3333333333333333;
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; __uint128_t z = 0x0f0f0f0f0f0f0f0f;
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; z <<= 64;
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; z |= 0x0f0f0f0f0f0f0f0f;
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; __uint128_t a = 0x0101010101010101;
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; a <<= 64;
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; a |= 0x0101010101010101;
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; unsigned mask = 120;
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; i = i - ((i >> 1) & x);
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; i = (i & y) + ((i >> 2) & y);
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; i = ((i + (i >> 4)) & z);
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; return (i * a) >> mask;
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;}
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define signext i32 @popcount128(i128 %0) {
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; CHECK-LABEL: @popcount128(
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; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP0:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i32
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; CHECK-NEXT: ret i32 [[TMP3]]
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;
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%2 = lshr i128 %0, 1
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%3 = and i128 %2, 113427455640312821154458202477256070485
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%4 = sub i128 %0, %3
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%5 = and i128 %4, 68056473384187692692674921486353642291
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%6 = lshr i128 %4, 2
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%7 = and i128 %6, 68056473384187692692674921486353642291
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%8 = add nuw nsw i128 %7, %5
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%9 = lshr i128 %8, 4
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%10 = add nuw nsw i128 %9, %8
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%11 = and i128 %10, 20016609818878733144904388672456953615
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%12 = mul i128 %11, 1334440654591915542993625911497130241
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%13 = lshr i128 %12, 120
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%14 = trunc i128 %13 to i32
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ret i32 %14
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}
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;vector unsigned char popcount8vec(vector unsigned char i)
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;{
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; i = i - ((i>> 1) & 0x55);
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; i = (i & 0x33) + ((i >> 2) & 0x33);
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; i = ((i + (i >> 4)) & 0x0F);
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; return (i * 0x01);
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;}
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define <16 x i8> @popcount8vec(<16 x i8> %0) {
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; CHECK-LABEL: @popcount8vec(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr <16 x i8> [[TMP0:%.*]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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; CHECK-NEXT: [[TMP3:%.*]] = and <16 x i8> [[TMP2]], <i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85>
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; CHECK-NEXT: [[TMP4:%.*]] = sub <16 x i8> [[TMP0]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i8> [[TMP4]], <i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51>
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; CHECK-NEXT: [[TMP6:%.*]] = lshr <16 x i8> [[TMP4]], <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
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; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i8> [[TMP6]], <i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51>
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; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw <16 x i8> [[TMP7]], [[TMP5]]
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; CHECK-NEXT: [[TMP9:%.*]] = lshr <16 x i8> [[TMP8]], <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
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; CHECK-NEXT: [[TMP10:%.*]] = add nuw nsw <16 x i8> [[TMP9]], [[TMP8]]
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; CHECK-NEXT: [[TMP11:%.*]] = and <16 x i8> [[TMP10]], <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>
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; CHECK-NEXT: ret <16 x i8> [[TMP11]]
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;
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%2 = lshr <16 x i8> %0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%3 = and <16 x i8> %2, <i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85, i8 85>
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%4 = sub <16 x i8> %0, %3
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%5 = and <16 x i8> %4, <i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51>
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%6 = lshr <16 x i8> %4, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
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%7 = and <16 x i8> %6, <i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51, i8 51>
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%8 = add nuw nsw <16 x i8> %7, %5
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%9 = lshr <16 x i8> %8, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
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%10 = add nuw nsw <16 x i8> %9, %8
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%11 = and <16 x i8> %10, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>
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ret <16 x i8> %11
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}
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;vector unsigned int popcount32vec(vector unsigned int i)
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;{
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; i = i - ((i>> 1) & 0x55555555);
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; i = (i & 0x33333333) + ((i >> 2) & 0x33333333);
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; i = ((i + (i >> 4)) & 0x0F0F0F0F);
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; return (i * 0x01010101) >> 24;
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;}
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define <4 x i32> @popcount32vec(<4 x i32> %0) {
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; CHECK-LABEL: @popcount32vec(
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; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> [[TMP0:%.*]])
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%2 = lshr <4 x i32> %0, <i32 1, i32 1, i32 1, i32 1>
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%3 = and <4 x i32> %2, <i32 1431655765, i32 1431655765, i32 1431655765, i32 1431655765>
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%4 = sub <4 x i32> %0, %3
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%5 = and <4 x i32> %4, <i32 858993459, i32 858993459, i32 858993459, i32 858993459>
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%6 = lshr <4 x i32> %4, <i32 2, i32 2, i32 2, i32 2>
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%7 = and <4 x i32> %6, <i32 858993459, i32 858993459, i32 858993459, i32 858993459>
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%8 = add nuw nsw <4 x i32> %7, %5
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%9 = lshr <4 x i32> %8, <i32 4, i32 4, i32 4, i32 4>
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%10 = add nuw nsw <4 x i32> %9, %8
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%11 = and <4 x i32> %10, <i32 252645135, i32 252645135, i32 252645135, i32 252645135>
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%12 = mul <4 x i32> %11, <i32 16843009, i32 16843009, i32 16843009, i32 16843009>
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%13 = lshr <4 x i32> %12, <i32 24, i32 24, i32 24, i32 24>
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ret <4 x i32> %13
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}
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