4dc5662c27
Three tests needed manual adjustment after https://reviews.llvm.org/D148216 got reverted. See https://github.com/llvm/llvm-project/issues/63746.
132 lines
8.1 KiB
LLVM
132 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
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; Test that we only promote arguments when the caller/callee have compatible
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; function attrubtes.
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target triple = "x86_64-unknown-linux-gnu"
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define internal fastcc void @no_promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
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; CHECK: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; CHECK-LABEL: define {{[^@]+}}@no_promote_avx2
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; CHECK-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = load <4 x i64>, ptr [[ARG1]], align 32
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; CHECK-NEXT: store <4 x i64> [[TMP]], ptr [[ARG]], align 32
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = load <4 x i64>, ptr %arg1
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store <4 x i64> %tmp, ptr %arg
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ret void
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}
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define void @no_promote(ptr %arg) #1 {
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; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; TUNIT-LABEL: define {{[^@]+}}@no_promote
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; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
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; TUNIT-NEXT: bb:
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; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
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; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
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; TUNIT-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
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; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
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; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
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; TUNIT-NEXT: ret void
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;
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; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; CGSCC-LABEL: define {{[^@]+}}@no_promote
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; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
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; CGSCC-NEXT: bb:
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; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
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; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
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; CGSCC-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
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; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
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; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
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; CGSCC-NEXT: ret void
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;
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bb:
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%tmp = alloca <4 x i64>, align 32
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%tmp2 = alloca <4 x i64>, align 32
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call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
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call fastcc void @no_promote_avx2(ptr %tmp2, ptr %tmp)
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%tmp4 = load <4 x i64>, ptr %tmp2, align 32
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store <4 x i64> %tmp4, ptr %arg, align 2
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ret void
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}
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define internal fastcc void @promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
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; CHECK: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; CHECK-LABEL: define {{[^@]+}}@promote_avx2
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; CHECK-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[ARG1_PRIV:%.*]] = alloca <4 x i64>, align 32
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; CHECK-NEXT: store <4 x i64> [[TMP0]], ptr [[ARG1_PRIV]], align 32
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; CHECK-NEXT: [[TMP:%.*]] = load <4 x i64>, ptr [[ARG1_PRIV]], align 32
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; CHECK-NEXT: store <4 x i64> [[TMP]], ptr [[ARG]], align 32
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = load <4 x i64>, ptr %arg1
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store <4 x i64> %tmp, ptr %arg
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ret void
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}
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define void @promote(ptr %arg) #0 {
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; TUNIT: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; TUNIT-LABEL: define {{[^@]+}}@promote
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; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] {
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; TUNIT-NEXT: bb:
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; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
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; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
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; TUNIT-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
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; TUNIT-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
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; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
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; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
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; TUNIT-NEXT: ret void
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;
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; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
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; CGSCC-LABEL: define {{[^@]+}}@promote
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; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR0]] {
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; CGSCC-NEXT: bb:
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; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
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; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
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; CGSCC-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
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; CGSCC-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
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; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
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; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
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; CGSCC-NEXT: ret void
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;
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bb:
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%tmp = alloca <4 x i64>, align 32
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%tmp2 = alloca <4 x i64>, align 32
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call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
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call fastcc void @promote_avx2(ptr %tmp2, ptr %tmp)
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%tmp4 = load <4 x i64>, ptr %tmp2, align 32
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store <4 x i64> %tmp4, ptr %arg, align 2
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #2
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attributes #0 = { inlinehint norecurse nounwind uwtable "target-features"="+avx2" }
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attributes #1 = { nounwind uwtable }
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attributes #2 = { argmemonly nounwind }
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;.
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; TUNIT: attributes #[[ATTR0]] = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "target-features"="+avx2" }
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; TUNIT: attributes #[[ATTR1]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable }
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; TUNIT: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: write) }
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; TUNIT: attributes #[[ATTR3]] = { nofree willreturn memory(write) }
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; TUNIT: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn }
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;.
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; CGSCC: attributes #[[ATTR0]] = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "target-features"="+avx2" }
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; CGSCC: attributes #[[ATTR1]] = { mustprogress nofree nosync nounwind willreturn memory(argmem: readwrite) uwtable }
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; CGSCC: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: write) }
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; CGSCC: attributes #[[ATTR3]] = { nofree willreturn memory(write) }
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; CGSCC: attributes #[[ATTR4]] = { nofree nounwind willreturn }
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;.
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