dce77a3579
We are replacing a narrow IV increment with a wider one. If the original (narrow) increment did not wrap, the wider one should not wrap either. Set the flags to be the union of both wide increment and original increment; this ensures we preserve flags SCEV could infer for the wider increment. Fixes https://github.com/llvm/llvm-project/issues/71517.
92 lines
3.7 KiB
LLVM
92 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S -passes=indvars < %s | FileCheck %s
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; Produced from the test-case:
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;
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; extern void foo(char *, unsigned , unsigned *);
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; extern void bar(int *, long);
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; extern char *processBuf(char *);
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;
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; extern unsigned theSize;
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;
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; void foo(char *buf, unsigned denominator, unsigned *flag) {
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; int incr = (int) (theSize / denominator);
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; int inx = 0;
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; while (*flag) {
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; int itmp = inx + incr;
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; int i = (int) theSize;
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; bar(&i, (long) itmp);
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; buf = processBuf(buf);
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; inx = itmp;
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; }
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; }
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@theSize = external local_unnamed_addr global i32, align 4
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; Check that there are two PHIs followed by a 'sext' in the same block, and that
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; the test does not crash.
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define void @foo(ptr %buf, i32 %denominator, ptr %flag) local_unnamed_addr {
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; CHECK-LABEL: define void @foo
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; CHECK-SAME: (ptr [[BUF:%.*]], i32 [[DENOMINATOR:%.*]], ptr [[FLAG:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @theSize, align 4
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[TMP0]], [[DENOMINATOR]]
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[FLAG]], align 4
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; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i32 [[TMP1]], 0
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; CHECK-NEXT: br i1 [[TOBOOL5]], label [[WHILE_END:%.*]], label [[WHILE_BODY_LR_PH:%.*]]
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; CHECK: while.body.lr.ph:
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; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
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; CHECK: while.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_LR_PH]] ]
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; CHECK-NEXT: [[BUF_ADDR_07:%.*]] = phi ptr [ [[BUF]], [[WHILE_BODY_LR_PH]] ], [ [[CALL:%.*]], [[WHILE_BODY]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[DIV]] to i64
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP2]]
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; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @theSize, align 4
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; CHECK-NEXT: store i32 [[TMP3]], ptr [[I]], align 4
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; CHECK-NEXT: call void @bar(ptr nonnull [[I]], i64 [[INDVARS_IV_NEXT]])
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; CHECK-NEXT: [[CALL]] = call ptr @processBuf(ptr [[BUF_ADDR_07]])
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[FLAG]], align 4
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]
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; CHECK: while.end.loopexit:
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; CHECK-NEXT: br label [[WHILE_END]]
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; CHECK: while.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%i = alloca i32, align 4
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%0 = load i32, ptr @theSize, align 4
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%div = udiv i32 %0, %denominator
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%1 = load i32, ptr %flag, align 4
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%tobool5 = icmp eq i32 %1, 0
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br i1 %tobool5, label %while.end, label %while.body.lr.ph
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while.body.lr.ph: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body.lr.ph, %while.body
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%buf.addr.07 = phi ptr [ %buf, %while.body.lr.ph ], [ %call, %while.body ]
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%inx.06 = phi i32 [ 0, %while.body.lr.ph ], [ %add, %while.body ]
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%add = add nsw i32 %inx.06, %div
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%2 = load i32, ptr @theSize, align 4
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store i32 %2, ptr %i, align 4
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%conv = sext i32 %add to i64
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call void @bar(ptr nonnull %i, i64 %conv)
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%call = call ptr @processBuf(ptr %buf.addr.07)
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%3 = load i32, ptr %flag, align 4
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%tobool = icmp eq i32 %3, 0
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br i1 %tobool, label %while.end.loopexit, label %while.body
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while.end.loopexit: ; preds = %while.body
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br label %while.end
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while.end: ; preds = %while.end.loopexit, %entry
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ret void
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}
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declare void @bar(ptr, i64) local_unnamed_addr
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declare ptr @processBuf(ptr) local_unnamed_addr
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