Wang Pengcheng 95b52ecb78 [RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max] (#82163) ...

So that we can benefit from some instcombine optimizations.

This PR contains two commits: the first is for adding tests and the
second is for the optimization.

2024-03-06 14:51:55 +08:00

..

libcall-arg-exts.ll

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lit.local.cfg

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memcmp.ll

[BuildLibCalls][RISCV] Sign extend return value of bcmp on riscv64.

2022-12-20 11:47:04 -08:00

riscv-vsetvli-knownbits.ll

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riscv-vsetvlimax-knownbits.ll

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