90ba33099c
This patch canonicalizes getelementptr instructions with constant indices to use the `i8` source element type. This makes it easier for optimizations to recognize that two GEPs are identical, because they don't need to see past many different ways to express the same offset. This is a first step towards https://discourse.llvm.org/t/rfc-replacing-getelementptr-with-ptradd/68699. This is limited to constant GEPs only for now, as they have a clear canonical form, while we're not yet sure how exactly to deal with variable indices. The test llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll gives two representative examples of the kind of optimization improvement we expect from this change. In the first test SimplifyCFG can now realize that all switch branches are actually the same. In the second test it can convert it into simple arithmetic. These are representative of common optimization failures we see in Rust. Fixes https://github.com/llvm/llvm-project/issues/69841.
111 lines
3.8 KiB
LLVM
111 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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define void @test(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[A]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[PTR]], i64 [[TMP0]]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[TMP1]], i64 40
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add nsw i32 %a, 10
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%idx = sext i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret void
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}
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define i32 @test_add_res_moreoneuse(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define i32 @test_add_res_moreoneuse(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 5
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; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[ADD]] to i64
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDX]]
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%add = add nsw i32 %a, 5
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%idx = sext i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret i32 %add
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}
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define void @test_addop_nonsw_flag(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define void @test_addop_nonsw_flag(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], 10
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; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[ADD]] to i64
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDX]]
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add i32 %a, 10
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%idx = sext i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret void
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}
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define void @test_add_op2_not_constant(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define void @test_add_op2_not_constant(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[ADD]] to i64
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDX]]
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add i32 %a, %b
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%idx = sext i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret void
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}
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define void @test_zext_nneg(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define void @test_zext_nneg(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[A]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[PTR]], i64 [[TMP0]]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[TMP1]], i64 40
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add nsw i32 %a, 10
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%idx = zext nneg i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret void
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}
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define void @test_zext_missing_nneg(ptr %ptr, i32 %a, i32 %b) {
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; CHECK-LABEL: define void @test_zext_missing_nneg(
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; CHECK-SAME: ptr [[PTR:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 10
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; CHECK-NEXT: [[IDX:%.*]] = zext i32 [[ADD]] to i64
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDX]]
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; CHECK-NEXT: store i32 [[B]], ptr [[GEP]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add nsw i32 %a, 10
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%idx = zext i32 %add to i64
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%gep = getelementptr inbounds i32, ptr %ptr, i64 %idx
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store i32 %b, ptr %gep
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ret void
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}
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