b0cc47c959
visitCallInst already looks for fixed width vector extracts where number of elements in the source and destination types are equal. This patch modifies the function to also identify scalable extracts which can be removed.
127 lines
5.2 KiB
LLVM
127 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; llvm.vector.extract canonicalizes to shufflevector in the fixed case. In the
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; scalable case, we lower to the EXTRACT_SUBVECTOR ISD node.
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declare <10 x i32> @llvm.vector.extract.v10i32.v8i32(<8 x i32> %vec, i64 %idx)
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declare <2 x i32> @llvm.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 %idx)
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declare <3 x i32> @llvm.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 %idx)
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declare <4 x i32> @llvm.vector.extract.v4i32.nxv4i32(<vscale x 4 x i32> %vec, i64 %idx)
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declare <4 x i32> @llvm.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 %idx)
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declare <8 x i32> @llvm.vector.extract.v8i32.v8i32(<8 x i32> %vec, i64 %idx)
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declare <vscale x 8 x i32> @llvm.vector.extract.nxv8i32.nxv8i32(<vscale x 8 x i32> %vec, i64 %idx)
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; ============================================================================ ;
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; Trivial cases
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; ============================================================================ ;
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; Extracting the entirety of a vector is a nop.
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define <8 x i32> @trivial_nop(<8 x i32> %vec) {
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; CHECK-LABEL: @trivial_nop(
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; CHECK-NEXT: ret <8 x i32> [[VEC:%.*]]
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;
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%1 = call <8 x i32> @llvm.vector.extract.v8i32.v8i32(<8 x i32> %vec, i64 0)
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ret <8 x i32> %1
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}
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define <vscale x 8 x i32> @trivial_nop_scalable(<vscale x 8 x i32> %vec) {
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; CHECK-LABEL: define <vscale x 8 x i32> @trivial_nop_scalable(
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; CHECK-SAME: <vscale x 8 x i32> [[VEC:%.*]]) {
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; CHECK-NEXT: ret <vscale x 8 x i32> [[VEC]]
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;
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%ext = call <vscale x 8 x i32> @llvm.vector.extract.nxv8i32.nxv8i32(<vscale x 8 x i32> %vec, i64 0)
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ret <vscale x 8 x i32> %ext
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}
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; ============================================================================ ;
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; Valid canonicalizations
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; ============================================================================ ;
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define <2 x i32> @valid_extraction_a(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_a(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 0, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%1 = call <2 x i32> @llvm.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 0)
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ret <2 x i32> %1
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}
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define <2 x i32> @valid_extraction_b(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_b(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%1 = call <2 x i32> @llvm.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 2)
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ret <2 x i32> %1
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}
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define <2 x i32> @valid_extraction_c(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_c(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 4, i32 5>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%1 = call <2 x i32> @llvm.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 4)
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ret <2 x i32> %1
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}
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define <2 x i32> @valid_extraction_d(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_d(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 6, i32 7>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%1 = call <2 x i32> @llvm.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 6)
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ret <2 x i32> %1
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}
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define <4 x i32> @valid_extraction_e(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_e(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = call <4 x i32> @llvm.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 0)
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ret <4 x i32> %1
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}
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define <4 x i32> @valid_extraction_f(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_f(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = call <4 x i32> @llvm.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 4)
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ret <4 x i32> %1
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}
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define <3 x i32> @valid_extraction_g(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_g(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2>
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; CHECK-NEXT: ret <3 x i32> [[TMP1]]
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;
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%1 = call <3 x i32> @llvm.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 0)
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ret <3 x i32> %1
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}
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define <3 x i32> @valid_extraction_h(<8 x i32> %vec) {
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; CHECK-LABEL: @valid_extraction_h(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <3 x i32> <i32 3, i32 4, i32 5>
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; CHECK-NEXT: ret <3 x i32> [[TMP1]]
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;
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%1 = call <3 x i32> @llvm.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 3)
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ret <3 x i32> %1
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}
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; ============================================================================ ;
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; Scalable cases
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; ============================================================================ ;
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; Scalable extractions should not be canonicalized. This will be lowered to the
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; EXTRACT_SUBVECTOR ISD node later.
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define <4 x i32> @scalable_extract(<vscale x 4 x i32> %vec) {
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; CHECK-LABEL: @scalable_extract(
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; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32(<vscale x 4 x i32> [[VEC:%.*]], i64 0)
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32(<vscale x 4 x i32> %vec, i64 0)
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ret <4 x i32> %1
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}
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