5918f62301
Use KnownBits to infer the nneg flag on zext instructions. Currently we only set nneg when converting sext -> zext, but don't set it when we have a zext in the first place. If we want to use it in optimizations, we should make sure the flag inference is consistent.
489 lines
17 KiB
LLVM
489 lines
17 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -S -passes=instcombine | FileCheck %s
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declare i32 @llvm.ctpop.i32(i32)
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declare i64 @llvm.ctpop.i64(i64)
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declare i8 @llvm.ctpop.i8(i8)
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declare i7 @llvm.ctpop.i7(i7)
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declare i1 @llvm.ctpop.i1(i1)
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declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
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declare void @llvm.assume(i1)
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declare void @use(i32)
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define i1 @test1(i32 %arg) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i1 false
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;
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%and = and i32 %arg, 15
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%cnt = call i32 @llvm.ctpop.i32(i32 %and)
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%res = icmp eq i32 %cnt, 9
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ret i1 %res
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}
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define i1 @test2(i32 %arg) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret i1 false
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;
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%and = and i32 %arg, 1
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%cnt = call i32 @llvm.ctpop.i32(i32 %and)
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%res = icmp eq i32 %cnt, 2
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ret i1 %res
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}
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define i1 @test3(i32 %arg) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[ASSUME:%.*]] = icmp eq i32 [[ARG:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME]])
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; CHECK-NEXT: ret i1 false
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;
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;; Use an assume to make all the bits known without triggering constant
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;; folding. This is trying to hit a corner case where we have to avoid
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;; taking the log of 0.
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%assume = icmp eq i32 %arg, 0
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call void @llvm.assume(i1 %assume)
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%cnt = call i32 @llvm.ctpop.i32(i32 %arg)
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%res = icmp eq i32 %cnt, 2
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ret i1 %res
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}
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; Negative test for when we know nothing
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define i1 @test4(i8 %arg) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[ARG:%.*]]), !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[CNT]], 2
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%cnt = call i8 @llvm.ctpop.i8(i8 %arg)
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%res = icmp eq i8 %cnt, 2
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ret i1 %res
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}
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; Test when the number of possible known bits isn't one less than a power of 2
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; and the compare value is greater but less than the next power of 2.
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define i1 @test5(i32 %arg) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i1 false
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;
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%and = and i32 %arg, 3
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%cnt = call i32 @llvm.ctpop.i32(i32 %and)
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%res = icmp eq i32 %cnt, 3
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ret i1 %res
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}
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; Test when the number of possible known bits isn't one less than a power of 2
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; and the compare value is greater but less than the next power of 2.
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define <2 x i1> @test5vec(<2 x i32> %arg) {
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; CHECK-LABEL: @test5vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%and = and <2 x i32> %arg, <i32 3, i32 3>
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%cnt = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %and)
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%res = icmp eq <2 x i32> %cnt, <i32 3, i32 3>
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ret <2 x i1> %res
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}
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; No intrinsic or range needed - ctpop of bool bit is the bit itself.
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define i1 @test6(i1 %arg) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: ret i1 [[ARG:%.*]]
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;
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%cnt = call i1 @llvm.ctpop.i1(i1 %arg)
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ret i1 %cnt
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}
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define i8 @mask_one_bit(i8 %x) {
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; CHECK-LABEL: @mask_one_bit(
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; CHECK-NEXT: [[A:%.*]] = lshr i8 [[X:%.*]], 4
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; CHECK-NEXT: [[R:%.*]] = and i8 [[A]], 1
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; CHECK-NEXT: ret i8 [[R]]
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;
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%a = and i8 %x, 16
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%r = call i8 @llvm.ctpop.i8(i8 %a)
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ret i8 %r
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}
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define <2 x i32> @mask_one_bit_splat(<2 x i32> %x, ptr %p) {
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; CHECK-LABEL: @mask_one_bit_splat(
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; CHECK-NEXT: [[A:%.*]] = and <2 x i32> [[X:%.*]], <i32 2048, i32 2048>
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; CHECK-NEXT: store <2 x i32> [[A]], ptr [[P:%.*]], align 8
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; CHECK-NEXT: [[R:%.*]] = lshr exact <2 x i32> [[A]], <i32 11, i32 11>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%a = and <2 x i32> %x, <i32 2048, i32 2048>
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store <2 x i32> %a, ptr %p
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%r = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
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ret <2 x i32> %r
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}
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define i32 @_parity_of_not(i32 %x) {
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; CHECK-LABEL: @_parity_of_not(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG1:![0-9]+]]
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; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP1]], 1
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; CHECK-NEXT: ret i32 [[R]]
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;
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%neg = xor i32 %x, -1
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%cnt = tail call i32 @llvm.ctpop.i32(i32 %neg)
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%r = and i32 %cnt, 1
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ret i32 %r
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}
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; Negative test - need even # of bits in type.
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define i7 @_parity_of_not_odd_type(i7 %x) {
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; CHECK-LABEL: @_parity_of_not_odd_type(
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; CHECK-NEXT: [[NEG:%.*]] = xor i7 [[X:%.*]], -1
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; CHECK-NEXT: [[CNT:%.*]] = tail call i7 @llvm.ctpop.i7(i7 [[NEG]]), !range [[RNG2:![0-9]+]]
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; CHECK-NEXT: [[R:%.*]] = and i7 [[CNT]], 1
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; CHECK-NEXT: ret i7 [[R]]
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;
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%neg = xor i7 %x, -1
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%cnt = tail call i7 @llvm.ctpop.i7(i7 %neg)
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%r = and i7 %cnt, 1
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ret i7 %r
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}
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define <2 x i32> @_parity_of_not_vec(<2 x i32> %x) {
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; CHECK-LABEL: @_parity_of_not_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG1]]
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%neg = xor <2 x i32> %x, <i32 -1 ,i32 -1>
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%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
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%r = and <2 x i32> %cnt, <i32 1 ,i32 1>
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ret <2 x i32> %r
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}
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define <2 x i32> @_parity_of_not_undef(<2 x i32> %x) {
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; CHECK-LABEL: @_parity_of_not_undef(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG1]]
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%neg = xor <2 x i32> %x, <i32 undef ,i32 -1>
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%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
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%r = and <2 x i32> %cnt, <i32 1 ,i32 1>
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ret <2 x i32> %r
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}
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define <2 x i32> @_parity_of_not_undef2(<2 x i32> %x) {
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; CHECK-LABEL: @_parity_of_not_undef2(
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; CHECK-NEXT: [[NEG:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
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; CHECK-NEXT: [[CNT:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[NEG]]), !range [[RNG1]]
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[CNT]], <i32 1, i32 undef>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%neg = xor <2 x i32> %x, <i32 -1 ,i32 -1>
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%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
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%r = and <2 x i32> %cnt, <i32 1 ,i32 undef>
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ret <2 x i32> %r
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}
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; PR48999
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define i32 @ctpop_add(i32 %a, i32 %b) {
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; CHECK-LABEL: @ctpop_add(
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; CHECK-NEXT: [[AND8:%.*]] = lshr i32 [[A:%.*]], 3
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; CHECK-NEXT: [[CTPOP1:%.*]] = and i32 [[AND8]], 1
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; CHECK-NEXT: [[AND2:%.*]] = lshr i32 [[B:%.*]], 1
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; CHECK-NEXT: [[CTPOP2:%.*]] = and i32 [[AND2]], 1
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; CHECK-NEXT: [[RES:%.*]] = add nuw nsw i32 [[CTPOP1]], [[CTPOP2]]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%and8 = and i32 %a, 8
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%ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %and8)
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%and2 = and i32 %b, 2
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%ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %and2)
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%res = add i32 %ctpop1, %ctpop2
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ret i32 %res
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}
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define i32 @ctpop_add_no_common_bits(i32 %a, i32 %b) {
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; CHECK-LABEL: @ctpop_add_no_common_bits(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[B:%.*]], i32 16)
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; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%shl16 = shl i32 %a, 16
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%ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %shl16)
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%lshl16 = lshr i32 %b, 16
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%ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %lshl16)
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%res = add i32 %ctpop1, %ctpop2
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ret i32 %res
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}
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define <2 x i32> @ctpop_add_no_common_bits_vec(<2 x i32> %a, <2 x i32> %b) {
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; CHECK-LABEL: @ctpop_add_no_common_bits_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]], <2 x i32> <i32 16, i32 16>)
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; CHECK-NEXT: [[RES:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
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; CHECK-NEXT: ret <2 x i32> [[RES]]
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;
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%shl16 = shl <2 x i32> %a, <i32 16, i32 16>
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%ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
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%lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
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%ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
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%res = add <2 x i32> %ctpop1, %ctpop2
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ret <2 x i32> %res
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}
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define <2 x i32> @ctpop_add_no_common_bits_vec_use(<2 x i32> %a, <2 x i32> %b, ptr %p) {
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; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use(
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; CHECK-NEXT: [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
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; CHECK-NEXT: [[CTPOP1:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]]), !range [[RNG3:![0-9]+]]
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; CHECK-NEXT: [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 16, i32 16>
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; CHECK-NEXT: [[CTPOP2:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]]), !range [[RNG3]]
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; CHECK-NEXT: store <2 x i32> [[CTPOP2]], ptr [[P:%.*]], align 8
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; CHECK-NEXT: [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
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; CHECK-NEXT: ret <2 x i32> [[RES]]
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;
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%shl16 = shl <2 x i32> %a, <i32 16, i32 16>
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%ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
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%lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
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%ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
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store <2 x i32> %ctpop2, ptr %p
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%res = add <2 x i32> %ctpop1, %ctpop2
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ret <2 x i32> %res
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}
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define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b, ptr %p) {
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; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use2(
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; CHECK-NEXT: [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
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; CHECK-NEXT: [[CTPOP1:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]]), !range [[RNG3]]
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; CHECK-NEXT: store <2 x i32> [[CTPOP1]], ptr [[P:%.*]], align 8
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; CHECK-NEXT: [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 16, i32 16>
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; CHECK-NEXT: [[CTPOP2:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]]), !range [[RNG3]]
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; CHECK-NEXT: [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
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; CHECK-NEXT: ret <2 x i32> [[RES]]
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;
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%shl16 = shl <2 x i32> %a, <i32 16, i32 16>
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%ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
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store <2 x i32> %ctpop1, ptr %p
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%lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
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%ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
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%res = add <2 x i32> %ctpop1, %ctpop2
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ret <2 x i32> %res
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}
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define i8 @ctpop_rotate_left(i8 %a, i8 %amt) {
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; CHECK-LABEL: @ctpop_rotate_left(
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; CHECK-NEXT: [[RES:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%rotl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 %amt)
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%res = tail call i8 @llvm.ctpop.i8(i8 %rotl)
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ret i8 %res
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}
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define i8 @ctpop_rotate_right(i8 %a, i8 %amt) {
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; CHECK-LABEL: @ctpop_rotate_right(
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; CHECK-NEXT: [[RES:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%rotr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 %amt)
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%res = tail call i8 @llvm.ctpop.i8(i8 %rotr)
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ret i8 %res
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}
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declare i8 @llvm.fshl.i8(i8, i8, i8)
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declare i8 @llvm.fshr.i8(i8, i8, i8)
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define i8 @sub_ctpop(i8 %a) {
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; CHECK-LABEL: @sub_ctpop(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[A:%.*]], -1
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; CHECK-NEXT: [[RES:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
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%res = sub i8 8, %cnt
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ret i8 %res
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}
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define i8 @sub_ctpop_wrong_cst(i8 %a) {
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; CHECK-LABEL: @sub_ctpop_wrong_cst(
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; CHECK-NEXT: [[CNT:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
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; CHECK-NEXT: [[RES:%.*]] = sub nsw i8 5, [[CNT]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
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%res = sub i8 5, %cnt
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ret i8 %res
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}
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define i8 @sub_ctpop_unknown(i8 %a, i8 %b) {
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; CHECK-LABEL: @sub_ctpop_unknown(
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; CHECK-NEXT: [[CNT:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
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; CHECK-NEXT: [[RES:%.*]] = sub i8 [[B:%.*]], [[CNT]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
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%res = sub i8 %b, %cnt
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ret i8 %res
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}
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define <2 x i32> @sub_ctpop_vec(<2 x i32> %a) {
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; CHECK-LABEL: @sub_ctpop_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], <i32 -1, i32 -1>
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; CHECK-NEXT: [[RES:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
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; CHECK-NEXT: ret <2 x i32> [[RES]]
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;
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%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
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%res = sub <2 x i32> <i32 32, i32 32>, %cnt
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ret <2 x i32> %res
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}
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define <2 x i32> @sub_ctpop_vec_extra_use(<2 x i32> %a, ptr %p) {
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; CHECK-LABEL: @sub_ctpop_vec_extra_use(
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; CHECK-NEXT: [[CNT:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[A:%.*]]), !range [[RNG1]]
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; CHECK-NEXT: store <2 x i32> [[CNT]], ptr [[P:%.*]], align 8
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; CHECK-NEXT: [[RES:%.*]] = sub nuw nsw <2 x i32> <i32 32, i32 32>, [[CNT]]
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; CHECK-NEXT: ret <2 x i32> [[RES]]
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;
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%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
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store <2 x i32> %cnt, ptr %p
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|
%res = sub <2 x i32> <i32 32, i32 32>, %cnt
|
|
ret <2 x i32> %res
|
|
}
|
|
|
|
define i32 @zext_ctpop(i16 %x) {
|
|
; CHECK-LABEL: @zext_ctpop(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ctpop.i16(i16 [[X:%.*]]), !range [[RNG4:![0-9]+]]
|
|
; CHECK-NEXT: [[P:%.*]] = zext nneg i16 [[TMP1]] to i32
|
|
; CHECK-NEXT: ret i32 [[P]]
|
|
;
|
|
%z = zext i16 %x to i32
|
|
%p = call i32 @llvm.ctpop.i32(i32 %z)
|
|
ret i32 %p
|
|
}
|
|
|
|
define <2 x i32> @zext_ctpop_vec(<2 x i7> %x) {
|
|
; CHECK-LABEL: @zext_ctpop_vec(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i7> @llvm.ctpop.v2i7(<2 x i7> [[X:%.*]]), !range [[RNG2]]
|
|
; CHECK-NEXT: [[P:%.*]] = zext nneg <2 x i7> [[TMP1]] to <2 x i32>
|
|
; CHECK-NEXT: ret <2 x i32> [[P]]
|
|
;
|
|
%z = zext <2 x i7> %x to <2 x i32>
|
|
%p = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %z)
|
|
ret <2 x i32> %p
|
|
}
|
|
|
|
define i32 @zext_ctpop_extra_use(i16 %x, ptr %q) {
|
|
; CHECK-LABEL: @zext_ctpop_extra_use(
|
|
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
|
|
; CHECK-NEXT: store i32 [[Z]], ptr [[Q:%.*]], align 4
|
|
; CHECK-NEXT: [[P:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Z]]), !range [[RNG3]]
|
|
; CHECK-NEXT: ret i32 [[P]]
|
|
;
|
|
%z = zext i16 %x to i32
|
|
store i32 %z, ptr %q
|
|
%p = call i32 @llvm.ctpop.i32(i32 %z)
|
|
ret i32 %p
|
|
}
|
|
|
|
define i32 @parity_xor(i32 %arg, i32 %arg1) {
|
|
; CHECK-LABEL: @parity_xor(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG:%.*]]
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I4:%.*]] = and i32 [[TMP2]], 1
|
|
; CHECK-NEXT: ret i32 [[I4]]
|
|
;
|
|
%i = tail call i32 @llvm.ctpop.i32(i32 %arg)
|
|
%i2 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
|
|
%i3 = xor i32 %i2, %i
|
|
%i4 = and i32 %i3, 1
|
|
ret i32 %i4
|
|
}
|
|
|
|
define i32 @parity_xor_trunc(i64 %arg, i64 %arg1) {
|
|
; CHECK-LABEL: @parity_xor_trunc(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[ARG1:%.*]], [[ARG:%.*]]
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.ctpop.i64(i64 [[TMP1]]), !range [[RNG5:![0-9]+]]
|
|
; CHECK-NEXT: [[I4:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[I5:%.*]] = and i32 [[I4]], 1
|
|
; CHECK-NEXT: ret i32 [[I5]]
|
|
;
|
|
%i = tail call i64 @llvm.ctpop.i64(i64 %arg)
|
|
%i2 = tail call i64 @llvm.ctpop.i64(i64 %arg1)
|
|
%i3 = xor i64 %i2, %i
|
|
%i4 = trunc i64 %i3 to i32
|
|
%i5 = and i32 %i4, 1
|
|
ret i32 %i5
|
|
}
|
|
|
|
define <2 x i32> @parity_xor_vec(<2 x i32> %arg, <2 x i32> %arg1) {
|
|
; CHECK-LABEL: @parity_xor_vec(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[ARG1:%.*]], [[ARG:%.*]]
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I4:%.*]] = and <2 x i32> [[TMP2]], <i32 1, i32 1>
|
|
; CHECK-NEXT: ret <2 x i32> [[I4]]
|
|
;
|
|
%i = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %arg)
|
|
%i2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %arg1)
|
|
%i3 = xor <2 x i32> %i2, %i
|
|
%i4 = and <2 x i32> %i3, <i32 1, i32 1>
|
|
ret <2 x i32> %i4
|
|
}
|
|
|
|
define i32 @parity_xor_wrong_cst(i32 %arg, i32 %arg1) {
|
|
; CHECK-LABEL: @parity_xor_wrong_cst(
|
|
; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG:%.*]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I2:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I3:%.*]] = xor i32 [[I2]], [[I]]
|
|
; CHECK-NEXT: [[I4:%.*]] = and i32 [[I3]], 3
|
|
; CHECK-NEXT: ret i32 [[I4]]
|
|
;
|
|
%i = tail call i32 @llvm.ctpop.i32(i32 %arg)
|
|
%i2 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
|
|
%i3 = xor i32 %i2, %i
|
|
%i4 = and i32 %i3, 3
|
|
ret i32 %i4
|
|
}
|
|
|
|
define i32 @parity_xor_extra_use(i32 %arg, i32 %arg1) {
|
|
; CHECK-LABEL: @parity_xor_extra_use(
|
|
; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG:%.*]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I2:%.*]] = and i32 [[I]], 1
|
|
; CHECK-NEXT: tail call void @use(i32 [[I2]])
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG]]
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I5:%.*]] = and i32 [[TMP2]], 1
|
|
; CHECK-NEXT: ret i32 [[I5]]
|
|
;
|
|
%i = tail call i32 @llvm.ctpop.i32(i32 %arg)
|
|
%i2 = and i32 %i, 1
|
|
tail call void @use(i32 %i2)
|
|
%i3 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
|
|
%i4 = and i32 %i3, 1
|
|
%i5 = xor i32 %i4, %i2
|
|
ret i32 %i5
|
|
}
|
|
|
|
define i32 @parity_xor_extra_use2(i32 %arg, i32 %arg1) {
|
|
; CHECK-LABEL: @parity_xor_extra_use2(
|
|
; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I2:%.*]] = and i32 [[I]], 1
|
|
; CHECK-NEXT: tail call void @use(i32 [[I2]])
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1]], [[ARG:%.*]]
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
|
|
; CHECK-NEXT: [[I5:%.*]] = and i32 [[TMP2]], 1
|
|
; CHECK-NEXT: ret i32 [[I5]]
|
|
;
|
|
%i = tail call i32 @llvm.ctpop.i32(i32 %arg1)
|
|
%i2 = and i32 %i, 1
|
|
tail call void @use(i32 %i2)
|
|
%i3 = tail call i32 @llvm.ctpop.i32(i32 %arg)
|
|
%i4 = and i32 %i3, 1
|
|
%i5 = xor i32 %i2, %i4
|
|
ret i32 %i5
|
|
}
|
|
|
|
define i32 @select_ctpop_zero(i32 %x) {
|
|
; CHECK-LABEL: @select_ctpop_zero(
|
|
; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG1]]
|
|
; CHECK-NEXT: ret i32 [[CTPOP]]
|
|
;
|
|
%ctpop = call i32 @llvm.ctpop.i32(i32 %x)
|
|
%cmp = icmp eq i32 %x, 0
|
|
%res = select i1 %cmp, i32 0, i32 %ctpop
|
|
ret i32 %res
|
|
}
|