d77067d08a
This adds support for using dominating conditions in computeKnownBits() when called from InstCombine. The implementation uses a DomConditionCache, which stores which branches may provide information that is relevant for a given value. DomConditionCache is similar to AssumptionCache, but does not try to do any kind of automatic tracking. Relevant branches have to be explicitly registered and invalidated values explicitly removed. The necessary tracking is done inside InstCombine. The reason why this doesn't just do exactly the same thing as AssumptionCache is that a lot more transforms touch branches and branch conditions than assumptions. AssumptionCache is an immutable analysis and mostly gets away with this because only a handful of places have to register additional assumptions (mostly as a result of cloning). This is very much not the case for branches. This change regresses compile-time by about ~0.2%. It also improves stage2-O0-g builds by about ~0.2%, which indicates that this change results in additional optimizations inside clang itself. Fixes https://github.com/llvm/llvm-project/issues/74242.
255 lines
7.6 KiB
LLVM
255 lines
7.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare void @use64(i64)
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declare void @llvm.assume(i1)
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define i1 @mul_unkV_oddC_eq(i32 %v) {
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; CHECK-LABEL: @mul_unkV_oddC_eq(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%mul = mul i32 %v, 3
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%cmp = icmp eq i32 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_unkV_oddC_eq_nonzero(i32 %v) {
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; CHECK-LABEL: @mul_unkV_oddC_eq_nonzero(
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[V:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL]], 4
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%mul = mul i32 %v, 3
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%cmp = icmp eq i32 %mul, 4
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ret i1 %cmp
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}
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define <2 x i1> @mul_unkV_oddC_ne_vec(<2 x i64> %v) {
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; CHECK-LABEL: @mul_unkV_oddC_ne_vec(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[V:%.*]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%mul = mul <2 x i64> %v, <i64 3, i64 3>
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%cmp = icmp ne <2 x i64> %mul, <i64 0, i64 0>
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ret <2 x i1> %cmp
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}
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define i1 @mul_assumeoddV_asumeoddV_eq(i16 %v, i16 %v2) {
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; CHECK-LABEL: @mul_assumeoddV_asumeoddV_eq(
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; CHECK-NEXT: [[LB:%.*]] = and i16 [[V:%.*]], 1
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; CHECK-NEXT: [[ODD:%.*]] = icmp ne i16 [[LB]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])
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; CHECK-NEXT: [[LB2:%.*]] = and i16 [[V2:%.*]], 1
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; CHECK-NEXT: [[ODD2:%.*]] = icmp ne i16 [[LB2]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ODD2]])
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; CHECK-NEXT: ret i1 true
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;
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%lb = and i16 %v, 1
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%odd = icmp ne i16 %lb, 0
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call void @llvm.assume(i1 %odd)
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%lb2 = and i16 %v2, 1
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%odd2 = icmp ne i16 %lb2, 0
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call void @llvm.assume(i1 %odd2)
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%mul = mul i16 %v, %v2
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%cmp = icmp ne i16 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_unkV_oddC_sge(i8 %v) {
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; CHECK-LABEL: @mul_unkV_oddC_sge(
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; CHECK-NEXT: [[MUL:%.*]] = mul i8 [[V:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[MUL]], -1
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%mul = mul i8 %v, 3
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%cmp = icmp sge i8 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_reused_unkV_oddC_ne(i64 %v) {
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; CHECK-LABEL: @mul_reused_unkV_oddC_ne(
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; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[V]], 0
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; CHECK-NEXT: call void @use64(i64 [[MUL]])
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%mul = mul i64 %v, 3
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%cmp = icmp ne i64 %mul, 0
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call void @use64(i64 %mul)
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ret i1 %cmp
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}
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define i1 @mul_assumeoddV_unkV_eq(i16 %v, i16 %v2) {
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; CHECK-LABEL: @mul_assumeoddV_unkV_eq(
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; CHECK-NEXT: [[LB:%.*]] = and i16 [[V2:%.*]], 1
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; CHECK-NEXT: [[ODD:%.*]] = icmp ne i16 [[LB]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[V:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%lb = and i16 %v2, 1
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%odd = icmp eq i16 %lb, 1
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call void @llvm.assume(i1 %odd)
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%mul = mul i16 %v, %v2
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%cmp = icmp eq i16 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_reusedassumeoddV_unkV_ne(i64 %v, i64 %v2) {
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; CHECK-LABEL: @mul_reusedassumeoddV_unkV_ne(
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; CHECK-NEXT: [[LB:%.*]] = and i64 [[V:%.*]], 1
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; CHECK-NEXT: [[ODD:%.*]] = icmp ne i64 [[LB]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])
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; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V]], [[V2:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[V2]], 0
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; CHECK-NEXT: call void @use64(i64 [[MUL]])
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%lb = and i64 %v, 1
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%odd = icmp ne i64 %lb, 0
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call void @llvm.assume(i1 %odd)
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%mul = mul i64 %v, %v2
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%cmp = icmp ne i64 %mul, 0
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call void @use64(i64 %mul)
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ret i1 %cmp
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}
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define <2 x i1> @mul_setoddV_unkV_ne(<2 x i32> %v1, <2 x i32> %v2) {
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; CHECK-LABEL: @mul_setoddV_unkV_ne(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V2:%.*]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%v = or <2 x i32> %v1, <i32 1, i32 1>
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%mul = mul <2 x i32> %v, %v2
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%cmp = icmp ne <2 x i32> %mul, <i32 0, i32 0>
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ret <2 x i1> %cmp
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}
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define i1 @mul_broddV_unkV_eq(i16 %v, i16 %v2) {
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; CHECK-LABEL: @mul_broddV_unkV_eq(
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; CHECK-NEXT: [[LB:%.*]] = and i16 [[V2:%.*]], 1
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; CHECK-NEXT: [[ODD_NOT:%.*]] = icmp eq i16 [[LB]], 0
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; CHECK-NEXT: br i1 [[ODD_NOT]], label [[FALSE:%.*]], label [[TRUE:%.*]]
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; CHECK: true:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[V:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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; CHECK: false:
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; CHECK-NEXT: call void @use64(i16 [[V]])
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; CHECK-NEXT: ret i1 false
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;
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%lb = and i16 %v2, 1
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%odd = icmp eq i16 %lb, 1
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br i1 %odd, label %true, label %false
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true:
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%mul = mul i16 %v, %v2
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%cmp = icmp eq i16 %mul, 0
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ret i1 %cmp
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false:
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call void @use64(i16 %v)
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ret i1 false
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}
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define i1 @mul_unkV_evenC_ne(i64 %v) {
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; CHECK-LABEL: @mul_unkV_evenC_ne(
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; CHECK-NEXT: [[MUL_MASK:%.*]] = and i64 [[V:%.*]], 4611686018427387903
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL_MASK]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%mul = mul i64 %v, 4
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%cmp = icmp ne i64 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_assumenzV_asumenzV_eq(i64 %v, i64 %v2) {
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; CHECK-LABEL: @mul_assumenzV_asumenzV_eq(
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; CHECK-NEXT: [[NZ:%.*]] = icmp ne i64 [[V:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[NZ]])
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; CHECK-NEXT: [[NZ2:%.*]] = icmp ne i64 [[V2:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[NZ2]])
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; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V]], [[V2]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[MUL]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%nz = icmp ne i64 %v, 0
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call void @llvm.assume(i1 %nz)
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%nz2 = icmp ne i64 %v2, 0
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call void @llvm.assume(i1 %nz2)
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%mul = mul i64 %v, %v2
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%cmp = icmp eq i64 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_assumenzV_unkV_nsw_ne(i32 %v, i32 %v2) {
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; CHECK-LABEL: @mul_assumenzV_unkV_nsw_ne(
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; CHECK-NEXT: [[NZ:%.*]] = icmp ne i32 [[V:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[NZ]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V2:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%nz = icmp ne i32 %v, 0
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call void @llvm.assume(i1 %nz)
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%mul = mul nsw i32 %v, %v2
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%cmp = icmp ne i32 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_selectnzV_unkV_nsw_ne(i8 %v, i8 %v2) {
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; CHECK-LABEL: @mul_selectnzV_unkV_nsw_ne(
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; CHECK-NEXT: [[NZ:%.*]] = icmp ne i8 [[V:%.*]], 0
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i8 [[V]], [[V2:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[MUL]], 0
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; CHECK-NEXT: [[R:%.*]] = select i1 [[NZ]], i1 [[CMP]], i1 false
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; CHECK-NEXT: ret i1 [[R]]
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;
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%nz = icmp ne i8 %v, 0
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%mul = mul nsw i8 %v, %v2
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%cmp = icmp ne i8 %mul, 0
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%r = select i1 %nz, i1 %cmp, i1 false
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ret i1 %r
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}
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define <2 x i1> @mul_unkV_unkV_nsw_nuw_ne(<2 x i16> %v, <2 x i16> %v2) {
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; CHECK-LABEL: @mul_unkV_unkV_nsw_nuw_ne(
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; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw <2 x i16> [[V:%.*]], [[V2:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i16> [[MUL]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%mul = mul nuw nsw <2 x i16> %v, %v2
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%cmp = icmp ne <2 x i16> %mul, <i16 0, i16 0>
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ret <2 x i1> %cmp
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}
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define i1 @mul_setnzV_unkV_nuw_eq(i8 %v1, i8 %v2) {
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; CHECK-LABEL: @mul_setnzV_unkV_nuw_eq(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[V2:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%v = or i8 %v1, 2
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%mul = mul nuw i8 %v, %v2
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%cmp = icmp eq i8 %mul, 0
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ret i1 %cmp
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}
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define i1 @mul_brnzV_unkV_nuw_eq(i64 %v, i64 %v2) {
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; CHECK-LABEL: @mul_brnzV_unkV_nuw_eq(
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; CHECK-NEXT: [[NZ_NOT:%.*]] = icmp eq i64 [[V2:%.*]], 0
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; CHECK-NEXT: br i1 [[NZ_NOT]], label [[FALSE:%.*]], label [[TRUE:%.*]]
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; CHECK: true:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[V:%.*]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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; CHECK: false:
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; CHECK-NEXT: call void @use64(i64 [[V]])
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; CHECK-NEXT: ret i1 false
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;
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%nz = icmp ne i64 %v2, 0
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br i1 %nz, label %true, label %false
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true:
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%mul = mul nuw i64 %v, %v2
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%cmp = icmp eq i64 %mul, 0
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ret i1 %cmp
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false:
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call void @use64(i64 %v)
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ret i1 false
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}
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