7203286329
According the discuss on D154953, we need to make the LangRef change
before the optimization relied on the new behaviour:
vscale_range implies vscale is a power-of-two value, parse of the
attribute to reject values that are not a power-of-two.
Thanks nikic for the wonderful summary of discussing on D154953:
To provide a bit more context here. We would like to have power of two vscale exposed in a target-independent way, so we can make use of this in places like ValueTracking, just like we currently do the vscale range. Some options that have been discussed are:
- Remove support for non-power-of-two vscales entirely. (This is my personal preference, but this is hard to undo if it turns out someone does need them.)
- Add an extra attribute vscale_pow2, or a data layout property.
- Make vscale_range imply power-of-two vscale, as a compromise solution (what this patch does). This would be relatively easy to turn into one of the two above at a later point.
Reviewed By: paulwalker-arm, nikic, efriedma
Differential Revision: https://reviews.llvm.org/D155193
194 lines
4.6 KiB
LLVM
194 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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define i1 @ugt_vscale64_x_32() vscale_range(1,16) {
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; CHECK-LABEL: @ugt_vscale64_x_32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%vscale = call i64 @llvm.vscale.i64()
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%num_els = shl i64 %vscale, 5
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%res = icmp ugt i64 %num_els, 1024
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ret i1 %res
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}
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define i1 @ugt_vscale64_x_31() vscale_range(1,16) {
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; CHECK-LABEL: @ugt_vscale64_x_31(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%vscale = call i64 @llvm.vscale.i64()
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%num_els = mul i64 %vscale, 31
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%res = icmp ugt i64 %num_els, 1024
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ret i1 %res
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}
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define i1 @ugt_vscale16_x_32() vscale_range(1,16) {
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; CHECK-LABEL: @ugt_vscale16_x_32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%vscale = call i16 @llvm.vscale.i16()
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%num_els = shl i16 %vscale, 5
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%res = icmp ugt i16 %num_els, 1024
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ret i1 %res
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}
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define i1 @ult_vscale16() vscale_range(1,16) {
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; CHECK-LABEL: @ult_vscale16(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%vscale = call i16 @llvm.vscale.i16()
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%res = icmp ult i16 1024, %vscale
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ret i1 %res
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}
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define i1 @ule_vscale64() vscale_range(1,16) {
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; CHECK-LABEL: @ule_vscale64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 false
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;
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entry:
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%vscale = call i64 @llvm.vscale.i64()
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%res = icmp ule i64 1024, %vscale
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ret i1 %res
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}
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define i1 @ueq_vscale64_range4_4() vscale_range(4,4) {
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; CHECK-LABEL: @ueq_vscale64_range4_4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%vscale = call i64 @llvm.vscale.i64()
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%res = icmp eq i64 %vscale, 4
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ret i1 %res
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}
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define i1 @ne_vscale64_x_32() vscale_range(1,16) {
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; CHECK-LABEL: @ne_vscale64_x_32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%vscale = call i64 @llvm.vscale.i64()
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%num_els = mul i64 %vscale, 32
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%res = icmp ne i64 %num_els, 39488
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ret i1 %res
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}
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define i1 @vscale_ule_max() vscale_range(4,8) {
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; CHECK-LABEL: @vscale_ule_max(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i16 @llvm.vscale.i16()
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%res = icmp ule i16 %vscale, 8
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ret i1 %res
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}
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define i1 @vscale_ult_max() vscale_range(4,8) {
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; CHECK-LABEL: @vscale_ult_max(
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; CHECK-NEXT: [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
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; CHECK-NEXT: [[RES:%.*]] = icmp ult i16 [[VSCALE]], 8
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%vscale = call i16 @llvm.vscale.i16()
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%res = icmp ult i16 %vscale, 8
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ret i1 %res
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}
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define i1 @vscale_uge_min() vscale_range(4,8) {
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; CHECK-LABEL: @vscale_uge_min(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i16 @llvm.vscale.i16()
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%res = icmp uge i16 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_ugt_min() vscale_range(4,8) {
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; CHECK-LABEL: @vscale_ugt_min(
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; CHECK-NEXT: [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
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; CHECK-NEXT: [[RES:%.*]] = icmp ugt i16 [[VSCALE]], 4
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%vscale = call i16 @llvm.vscale.i16()
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%res = icmp ugt i16 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_uge_no_max() vscale_range(4) {
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; CHECK-LABEL: @vscale_uge_no_max(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp uge i8 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_ugt_no_max() vscale_range(4) {
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; CHECK-LABEL: @vscale_ugt_no_max(
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; CHECK-NEXT: ret i1 false
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp ugt i8 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_uge_max_overflow() vscale_range(4,256) {
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; CHECK-LABEL: @vscale_uge_max_overflow(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp uge i8 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_ugt_max_overflow() vscale_range(4,256) {
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; CHECK-LABEL: @vscale_ugt_max_overflow(
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; CHECK-NEXT: [[VSCALE:%.*]] = call i8 @llvm.vscale.i8()
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; CHECK-NEXT: [[RES:%.*]] = icmp ugt i8 [[VSCALE]], 4
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp ugt i8 %vscale, 4
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ret i1 %res
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}
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define i1 @vscale_eq_min_overflow() vscale_range(256,512) {
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; CHECK-LABEL: @vscale_eq_min_overflow(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp eq i8 %vscale, 42
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ret i1 %res
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}
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define i1 @vscale_ult_min_overflow() vscale_range(256,512) {
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; CHECK-LABEL: @vscale_ult_min_overflow(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp ult i8 %vscale, 42
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ret i1 %res
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}
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define i1 @vscale_ugt_min_overflow() vscale_range(256,512) {
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; CHECK-LABEL: @vscale_ugt_min_overflow(
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; CHECK-NEXT: ret i1 true
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;
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%vscale = call i8 @llvm.vscale.i8()
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%res = icmp ugt i8 %vscale, 42
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ret i1 %res
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}
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declare i8 @llvm.vscale.i8()
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declare i16 @llvm.vscale.i16()
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declare i32 @llvm.vscale.i32()
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declare i64 @llvm.vscale.i64()
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