d428f09b2c
As discussed in issue #37809, this transform is not safe if the input is an undefined value. There is no difference in codegen on the basic examples, but this could lead to regressions. We may need to improve freeze analysis or lowering if that happens.
81 lines
3.0 KiB
LLVM
81 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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define <4 x i32> @test_v4i32_splatconst_pow2(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_splatconst_pow2(
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; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[A0:%.*]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = urem <4 x i32> %a0, <i32 2, i32 2, i32 2, i32 2>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_const_pow2(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_const_pow2(
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; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[A0:%.*]], <i32 0, i32 1, i32 3, i32 7>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = urem <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_const_pow2_undef(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_const_pow2_undef(
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; CHECK-NEXT: ret <4 x i32> poison
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;
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%1 = urem <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 undef>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_one(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_one(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <4 x i32> [[A0:%.*]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%1 = urem <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %a0
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_one_undef(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_one_undef(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <4 x i32> [[A0:%.*]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%1 = urem <4 x i32> <i32 1, i32 1, i32 1, i32 undef>, %a0
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconstsplat(
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; CHECK-NEXT: [[A0_FR:%.*]] = freeze <4 x i32> [[A0:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i32> [[A0_FR]], <i32 -3, i32 -3, i32 -3, i32 -3>
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; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[A0_FR]], <i32 3, i32 3, i32 3, i32 3>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A0_FR]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: ret <4 x i32> [[TMP3]]
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;
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%1 = urem <4 x i32> %a0, <i32 -3, i32 -3, i32 -3, i32 -3>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_negconst(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconst(
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; CHECK-NEXT: [[A0_FR:%.*]] = freeze <4 x i32> [[A0:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i32> [[A0_FR]], <i32 -3, i32 -5, i32 -7, i32 -9>
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; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[A0_FR]], <i32 3, i32 5, i32 7, i32 9>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A0_FR]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: ret <4 x i32> [[TMP3]]
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;
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%1 = urem <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 -9>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_negconst_undef(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconst_undef(
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; CHECK-NEXT: ret <4 x i32> poison
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;
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%1 = urem <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 undef>
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ret <4 x i32> %1
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}
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