10da9844d0
The LSR may suggest less profitable transformation to the loop. This patch adds check to prevent LSR from generating worse code than what we already have. Since LSR affects nearly all targets, the patch is guarded by the option 'lsr-drop-solution' and default as disable for now. The next step should be extending an TTI interface to allow target(s) to enable this enhancememnt. Debug log is added to remind user of such choice to skip the LSR solution. Reviewed By: Meinersbur, #loopoptwg Differential Revision: https://reviews.llvm.org/D126043
56 lines
2.5 KiB
LLVM
56 lines
2.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -O3 -mattr=+v -debug -lsr-drop-solution 2>&1 | FileCheck --check-prefix=DEBUG %s
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; RUN: llc < %s -O3 -mattr=+v -debug 2>&1 | FileCheck --check-prefix=DEBUG2 %s
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64-unknown-linux-gnu"
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define ptr @foo(ptr %a0, ptr %a1, i64 %a2) {
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;DEBUG: The chosen solution requires 3 instructions 6 regs, with addrec cost 1, plus 2 base adds, plus 5 setup cost
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;DEBUG: The baseline solution requires 2 instructions 4 regs, with addrec cost 2, plus 3 setup cost
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;DEBUG: Baseline is more profitable than chosen solution, dropping LSR solution.
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;DEBUG2: Baseline is more profitable than chosen solution, add option 'lsr-drop-solution' to drop LSR solution.
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entry:
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%0 = ptrtoint ptr %a0 to i64
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%1 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %a2, i64 0, i64 3)
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%cmp.not = icmp eq i64 %1, %a2
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br i1 %cmp.not, label %if.end, label %if.then
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if.then: ; preds = %entry
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%add = add i64 %0, %a2
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%sub = sub i64 %add, %1
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br label %do.body
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do.body: ; preds = %do.body, %if.then
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%a3.0 = phi i64 [ %0, %if.then ], [ %add1, %do.body ]
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%a1.addr.0 = phi ptr [ %a1, %if.then ], [ %add.ptr, %do.body ]
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%2 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.0, i64 %1)
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%3 = inttoptr i64 %a3.0 to ptr
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tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %2, ptr %3, i64 %1)
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%add1 = add i64 %a3.0, %1
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%add.ptr = getelementptr i8, ptr %a1.addr.0, i64 %1
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%cmp2 = icmp ugt i64 %sub, %add1
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br i1 %cmp2, label %do.body, label %do.end
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do.end: ; preds = %do.body
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%sub4 = sub i64 %add, %add1
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%4 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %sub4, i64 0, i64 3)
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br label %if.end
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if.end: ; preds = %do.end, %entry
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%a3.1 = phi i64 [ %add1, %do.end ], [ %0, %entry ]
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%t0.0 = phi i64 [ %4, %do.end ], [ %a2, %entry ]
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%a1.addr.1 = phi ptr [ %add.ptr, %do.end ], [ %a1, %entry ]
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%5 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.1, i64 %t0.0)
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%6 = inttoptr i64 %a3.1 to ptr
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tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %5, ptr %6, i64 %t0.0)
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ret ptr %a0
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}
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declare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg)
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declare <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64)
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declare void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64)
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