e5e71affb7
Reverse mask early on when populating BlockInMask. This will enable separating mask management and address computation from the memory recipes in the future and is also needed to enable explicit unrolling in VPlan.
64 lines
2.8 KiB
LLVM
64 lines
2.8 KiB
LLVM
; This is the loop in c++ being vectorize in this file with
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; experimental.vector.reverse
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;#pragma clang loop vectorize_width(4, scalable)
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; for (long int i = N - 1; i >= 0; i--)
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; {
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; if (cond[i])
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; a[i] += 1;
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; }
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; The test checks if the mask is being correctly created, reverted and used
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; RUN: opt -passes=loop-vectorize,dce -mtriple aarch64-linux-gnu -S \
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; RUN: -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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define void @vector_reverse_mask_nxv4i1(ptr %a, ptr %cond, i64 %N) #0 {
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; CHECK-LABEL: vector.body:
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; CHECK: %[[REVERSE6:.*]] = call <vscale x 4 x i1> @llvm.experimental.vector.reverse.nxv4i1(<vscale x 4 x i1> %{{.*}})
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; CHECK: %[[WIDEMSKLOAD:.*]] = call <vscale x 4 x double> @llvm.masked.load.nxv4f64.p0(ptr %{{.*}}, i32 8, <vscale x 4 x i1> %[[REVERSE6]], <vscale x 4 x double> poison)
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; CHECK: %[[REVERSE7:.*]] = call <vscale x 4 x double> @llvm.experimental.vector.reverse.nxv4f64(<vscale x 4 x double> %[[WIDEMSKLOAD]])
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; CHECK: %[[FADD:.*]] = fadd <vscale x 4 x double> %[[REVERSE7]]
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; CHECK: %[[REVERSE9:.*]] = call <vscale x 4 x i1> @llvm.experimental.vector.reverse.nxv4i1(<vscale x 4 x i1> %{{.*}})
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; CHECK: %[[REVERSE8:.*]] = call <vscale x 4 x double> @llvm.experimental.vector.reverse.nxv4f64(<vscale x 4 x double> %[[FADD]])
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; CHECK: call void @llvm.masked.store.nxv4f64.p0(<vscale x 4 x double> %[[REVERSE8]], ptr %{{.*}}, i32 8, <vscale x 4 x i1> %[[REVERSE9]]
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup, %entry
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ret void
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for.body: ; preds = %for.body, %entry
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%i.08.in = phi i64 [ %i.08, %for.inc ], [ %N, %entry ]
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%i.08 = add nsw i64 %i.08.in, -1
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%arrayidx = getelementptr inbounds double, ptr %cond, i64 %i.08
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%0 = load double, ptr %arrayidx, align 8
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%tobool = fcmp une double %0, 0.000000e+00
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br i1 %tobool, label %if.then, label %for.inc
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if.then: ; preds = %for.body
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%arrayidx1 = getelementptr inbounds double, ptr %a, i64 %i.08
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%1 = load double, ptr %arrayidx1, align 8
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%add = fadd double %1, 1.000000e+00
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store double %add, ptr %arrayidx1, align 8
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br label %for.inc
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for.inc: ; preds = %for.body, %if.then
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%cmp = icmp sgt i64 %i.08.in, 1
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br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
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}
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attributes #0 = {"target-cpu"="generic" "target-features"="+neon,+sve"}
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!0 = distinct !{!0, !1, !2, !3, !4}
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!1 = !{!"llvm.loop.mustprogress"}
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!2 = !{!"llvm.loop.vectorize.width", i32 4}
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!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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!4 = !{!"llvm.loop.vectorize.enable", i1 true}
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