e3cf80c5c1
BlockFrequencyInfo calculates block frequencies as Scaled64 numbers but as a last step converts them to unsigned 64bit integers (`BlockFrequency`). This improves the factors picked for this conversion so that: * Avoid big numbers close to UINT64_MAX to avoid users overflowing/saturating when adding multiply frequencies together or when multiplying with integers. This leaves the topmost 10 bits unused to allow for some room. * Spread the difference between hottest/coldest block as much as possible to increase precision. * If the hot/cold spread cannot be represented loose precision at the lower end, but keep the frequencies at the upper end for hot blocks differentiable.
122 lines
4.1 KiB
LLVM
122 lines
4.1 KiB
LLVM
; RUN: opt -mattr=+avx512f -passes=loop-vectorize -S < %s | llc -mattr=+avx512f | FileCheck %s
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; RUN: opt -mattr=+avx512vl,+prefer-256-bit -passes=loop-vectorize -S < %s | llc -mattr=+avx512f | FileCheck %s --check-prefix=CHECK-PREFER-AVX256
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.9.0"
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; Verify that we generate 512-bit wide vectors for a basic integer memset
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; loop.
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; CHECK-LABEL: _f:
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; CHECK: %vec.epilog.vector.body
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; CHECK: %ymm
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; CHECK: %vector.body
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; CHECK-NOT: %ymm
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; CHECK: vmovdqu64 %zmm{{.}},
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; Verify that we don't generate 512-bit wide vectors when subtarget feature says not to
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; CHECK-PREFER-AVX256-LABEL: f:
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; CHECK-PREFER-AVX256: vmovdqu %ymm{{.}},
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; CHECK-PREFER-AVX256-NOT: %zmm
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define void @f(ptr %a, i32 %n) {
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entry:
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%cmp4 = icmp sgt i32 %n, 0
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br i1 %cmp4, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
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store i32 %n, ptr %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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; Verify that the "prefer-vector-width=256" attribute prevents the use of 512-bit
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; vectors
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; CHECK-LABEL: _g:
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; CHECK: vmovdqu %ymm{{.}},
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; CHECK-NOT: %zmm
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; CHECK-PREFER-AVX256-LABEL: g:
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; CHECK-PREFER-AVX256: vmovdqu %ymm{{.}},
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; CHECK-PREFER-AVX256-NOT: %zmm
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define void @g(ptr %a, i32 %n) "prefer-vector-width"="256" {
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entry:
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%cmp4 = icmp sgt i32 %n, 0
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br i1 %cmp4, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
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store i32 %n, ptr %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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; Verify that the "prefer-vector-width=512" attribute override the subtarget
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; vectors
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; CHECK-LABEL: _h:
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; CHECK: %vec.epilog.vector.body
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; CHECK: %ymm
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; CHECK: %vector.body
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; CHECK: vmovdqu64 %zmm{{.}},
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; CHECK-NOT: %ymm
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; CHECK-PREFER-AVX256-LABEL: h:
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; CHECK-PREFER-AVX256: %vec.epilog.vector.body
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; CHECK-PREFER-AVX256: %ymm
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; CHECK-PREFER-AVX256: %vector.body
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; CHECK-PREFER-AVX256: vmovdqu64 %zmm{{.}},
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; CHECK-PREFER-AVX256-NOT: %ymm
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define void @h(ptr %a, i32 %n) "prefer-vector-width"="512" {
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entry:
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%cmp4 = icmp sgt i32 %n, 0
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br i1 %cmp4, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
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store i32 %n, ptr %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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