9536a6286e
Update createScalarIVSteps to take an insert point as parameter. This ensures that the inserted scalar steps are in the same order as the recipes they replace (vs in reverse order as currently). This helps to reduce the diff for follow-up changes.
254 lines
7.4 KiB
LLVM
254 lines
7.4 KiB
LLVM
; RUN: opt -S -passes=loop-vectorize -force-vector-width=8 -force-vector-interleave=1 < %s | FileCheck %s -check-prefix=VF8
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; RUN: opt -S -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=4 < %s | FileCheck %s -check-prefix=VF1
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Given a loop with an induction variable which is being
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; truncated/extended using casts that had been proven to
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; be redundant under a runtime test, we want to make sure
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; that these casts, do not get vectorized/scalarized/widened.
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; This is the case for inductions whose SCEV expression is
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; of the form "ExtTrunc(%phi) + %step", where "ExtTrunc"
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; can be a result of the IR sequences we check below.
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;
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; See also pr30654.
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;
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; Case1: Check the following induction pattern:
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;
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; %p.09 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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; %sext = shl i32 %p.09, 24
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; %conv = ashr exact i32 %sext, 24
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; %add = add nsw i32 %conv, %step
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;
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; This is the case in the following code:
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;
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; void doit1(int n, int step) {
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; int i;
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; char p = 0;
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; for (i = 0; i < n; i++) {
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; a[i] = p;
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; p = p + step;
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; }
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; }
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;
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; The "ExtTrunc" IR sequence here is:
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; "%sext = shl i32 %p.09, 24"
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; "%conv = ashr exact i32 %sext, 24"
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; We check that it does not appear in the vector loop body, whether
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; we vectorize or scalarize the induction.
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; In the case of widened induction, this means that the induction phi
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; is directly used, without shl/ashr on the way.
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; VF8-LABEL: @doit1
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; VF8: vector.body:
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; VF8: %vec.ind = phi <8 x i32>
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; VF8: store <8 x i32> %vec.ind
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; VF8: middle.block:
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; VF1-LABEL: @doit1
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; VF1: vector.body:
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; VF1-NOT: %{{.*}} = shl i32
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; VF1: middle.block:
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@a = common local_unnamed_addr global [250 x i32] zeroinitializer, align 16
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define void @doit1(i32 %n, i32 %step) {
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entry:
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%cmp7 = icmp sgt i32 %n, 0
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br i1 %cmp7, label %for.body.lr.ph, label %for.end
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for.body.lr.ph:
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%p.09 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%sext = shl i32 %p.09, 24
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%conv = ashr exact i32 %sext, 24
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%arrayidx = getelementptr inbounds [250 x i32], ptr @a, i64 0, i64 %indvars.iv
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store i32 %conv, ptr %arrayidx, align 4
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%add = add nsw i32 %conv, %step
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit:
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br label %for.end
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for.end:
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ret void
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}
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; Case2: Another variant of the above pattern is where the induction variable
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; is used only for address compuation (i.e. it is a GEP index) and therefore
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; the induction is not vectorized but rather only the step is widened.
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;
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; This is the case in the following code, where the induction variable 'w_ix'
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; is only used to access the array 'in':
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;
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; void doit2(int *in, int *out, size_t size, size_t step)
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; {
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; int w_ix = 0;
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; for (size_t offset = 0; offset < size; ++offset)
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; {
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; int w = in[w_ix];
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; out[offset] = w;
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; w_ix += step;
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; }
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; }
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;
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; The "ExtTrunc" IR sequence here is similar to the previous case:
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; "%sext = shl i64 %w_ix.012, 32
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; %idxprom = ashr exact i64 %sext, 32"
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; We check that it does not appear in the vector loop body, whether
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; we widen or scalarize the induction.
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; In the case of widened induction, this means that the induction phi
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; is directly used, without shl/ashr on the way.
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; VF8-LABEL: @doit2
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; VF8: vector.body:
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; VF8-NEXT: [[INDEX:%.+]] = phi i64 [ 0, %vector.ph ]
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; VF8-NEXT: [[OFFSET_IDX:%.+]] = mul i64 [[INDEX]], %step
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; VF8-NEXT: [[MUL0:%.+]] = mul i64 0, %step
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; VF8-NEXT: [[ADD:%.+]] = add i64 [[OFFSET_IDX]], [[MUL0]]
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; VF8: [[I0:%.+]] = add i64 [[INDEX]], 0
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; VF8: getelementptr inbounds i32, ptr %in, i64 [[ADD]]
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; VF8: middle.block:
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; VF1-LABEL: @doit2
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; VF1: vector.body:
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; VF1-NOT: %{{.*}} = shl i64
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; VF1: middle.block:
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;
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define void @doit2(ptr nocapture readonly %in, ptr nocapture %out, i64 %size, i64 %step) {
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entry:
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%cmp9 = icmp eq i64 %size, 0
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br i1 %cmp9, label %for.cond.cleanup, label %for.body.lr.ph
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for.body.lr.ph:
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br label %for.body
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for.cond.cleanup.loopexit:
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br label %for.cond.cleanup
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for.cond.cleanup:
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ret void
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for.body:
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%w_ix.011 = phi i64 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%offset.010 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%sext = shl i64 %w_ix.011, 32
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%idxprom = ashr exact i64 %sext, 32
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%arrayidx = getelementptr inbounds i32, ptr %in, i64 %idxprom
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%0 = load i32, ptr %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, ptr %out, i64 %offset.010
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store i32 %0, ptr %arrayidx1, align 4
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%add = add i64 %idxprom, %step
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%inc = add nuw i64 %offset.010, 1
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%exitcond = icmp eq i64 %inc, %size
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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; Case3: Lastly, check also the following induction pattern:
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;
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; %p.09 = phi i32 [ %val0, %scalar.ph ], [ %add, %for.body ]
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; %conv = and i32 %p.09, 255
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; %add = add nsw i32 %conv, %step
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;
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; This is the case in the following code:
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;
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; int a[N];
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; void doit3(int n, int step) {
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; int i;
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; unsigned char p = 0;
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; for (i = 0; i < n; i++) {
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; a[i] = p;
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; p = p + step;
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; }
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; }
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;
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; The "ExtTrunc" IR sequence here is:
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; "%conv = and i32 %p.09, 255".
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; We check that it does not appear in the vector loop body, whether
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; we vectorize or scalarize the induction.
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; VF8-LABEL: @doit3
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; VF8: vector.body:
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; VF8: %vec.ind = phi <8 x i32>
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; VF8: store <8 x i32> %vec.ind
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; VF8: middle.block:
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; VF1-LABEL: @doit3
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; VF1: vector.body:
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; VF1-NOT: %{{.*}} = and i32
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; VF1: middle.block:
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define void @doit3(i32 %n, i32 %step) {
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entry:
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%cmp7 = icmp sgt i32 %n, 0
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br i1 %cmp7, label %for.body.lr.ph, label %for.end
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for.body.lr.ph:
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%p.09 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%conv = and i32 %p.09, 255
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%arrayidx = getelementptr inbounds [250 x i32], ptr @a, i64 0, i64 %indvars.iv
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store i32 %conv, ptr %arrayidx, align 4
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%add = add nsw i32 %conv, %step
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit:
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br label %for.end
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for.end:
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ret void
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}
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; VF8-LABEL: @test_conv_in_latch_block
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; VF8: vector.body:
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; VF8-NEXT: %index = phi i64
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; VF8-NEXT: %vec.ind = phi <8 x i32>
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; VF8: store <8 x i32> %vec.ind
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; VF8: middle.block:
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;
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define void @test_conv_in_latch_block(i32 %n, i32 %step, ptr noalias %A, ptr noalias %B) {
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entry:
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%wide.trip.count = zext i32 %n to i64
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
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%p.09 = phi i32 [ 0, %entry ], [ %add, %latch ]
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%B.gep = getelementptr inbounds i32, ptr %B, i64 %iv
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%l = load i32, ptr %B.gep
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%c = icmp eq i32 %l, 0
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br i1 %c, label %then, label %latch
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then:
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%A.gep = getelementptr inbounds i32, ptr %A, i64 %iv
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store i32 0, ptr %A.gep
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br label %latch
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latch:
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%sext = shl i32 %p.09, 24
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%conv = ashr exact i32 %sext, 24
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%add = add nsw i32 %conv, %step
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store i32 %conv, ptr %B.gep, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %wide.trip.count
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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