90ba33099c
This patch canonicalizes getelementptr instructions with constant indices to use the `i8` source element type. This makes it easier for optimizations to recognize that two GEPs are identical, because they don't need to see past many different ways to express the same offset. This is a first step towards https://discourse.llvm.org/t/rfc-replacing-getelementptr-with-ptradd/68699. This is limited to constant GEPs only for now, as they have a clear canonical form, while we're not yet sure how exactly to deal with variable indices. The test llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll gives two representative examples of the kind of optimization improvement we expect from this change. In the first test SimplifyCFG can now realize that all switch branches are actually the same. In the second test it can convert it into simple arithmetic. These are representative of common optimization failures we see in Rust. Fixes https://github.com/llvm/llvm-project/issues/69841.
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -O2 -mattr=avx < %s | FileCheck %s
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; RUN: opt -S -passes="default<O2>" -mattr=avx < %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; FIXME: The br -> switch conversion blocks vectorization.
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define dso_local void @test(ptr %start, ptr %end) #0 {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[I11_NOT1:%.*]] = icmp eq ptr [[START:%.*]], [[END:%.*]]
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; CHECK-NEXT: br i1 [[I11_NOT1]], label [[EXIT:%.*]], label [[BB12:%.*]]
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; CHECK: bb12:
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; CHECK-NEXT: [[PTR2:%.*]] = phi ptr [ [[PTR_NEXT:%.*]], [[LATCH:%.*]] ], [ [[START]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[PTR2]], align 4
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; CHECK-NEXT: switch i32 [[VAL]], label [[LATCH]] [
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; CHECK-NEXT: i32 -12, label [[STORE:%.*]]
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; CHECK-NEXT: i32 13, label [[STORE]]
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; CHECK-NEXT: ]
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; CHECK: store:
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; CHECK-NEXT: store i32 42, ptr [[PTR2]], align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]], i64 4
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; CHECK-NEXT: [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
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; CHECK-NEXT: br i1 [[I11_NOT]], label [[EXIT]], label [[BB12]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %header
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header:
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%ptr = phi ptr [ %start, %entry ], [ %ptr.next, %latch ]
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%i11 = icmp ne ptr %ptr, %end
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br i1 %i11, label %bb12, label %exit
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bb12:
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%val = load i32, ptr %ptr, align 4
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%c1 = icmp eq i32 %val, 13
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%c2 = icmp eq i32 %val, -12
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%c3 = or i1 %c1, %c2
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br i1 %c3, label %store, label %latch
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store:
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store i32 42, ptr %ptr, align 4
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br label %latch
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latch:
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%ptr.next = getelementptr inbounds i32, ptr %ptr, i32 1
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br label %header
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exit:
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ret void
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}
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