For the attached test case, currently llvm generates instructions to load/or/store the bytes one by one. Although NEON doesn't support v4i8 natively, we can promote it to v4i16 and operate on v4i16 vectors. So this patch override getStoreMinimumVF and specify the minimum VF for i8 vector is v4i8. Differential Revision: https://reviews.llvm.org/D145614
57 lines
2.3 KiB
LLVM
57 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -passes=slp-vectorizer -S < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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%S = type { i8, i8, i8, i8 }
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define ptr @foo(ptr %this, ptr %rhs) {
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; CHECK-LABEL: define ptr @foo
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; CHECK-SAME: (ptr [[THIS:%.*]], ptr [[RHS:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i8>, ptr [[RHS]], align 1, !tbaa [[TBAA0:![0-9]+]]
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr [[THIS]], align 1, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[TMP2:%.*]] = or <4 x i8> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: store <4 x i8> [[TMP2]], ptr [[THIS]], align 1, !tbaa [[TBAA0]]
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; CHECK-NEXT: ret ptr [[THIS]]
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;
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entry:
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%right1 = load i8, ptr %rhs, align 1, !tbaa !6, !range !11, !noundef !12
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%left1 = load i8, ptr %this, align 1, !tbaa !6, !range !11, !noundef !12
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%res1 = or i8 %right1, %left1
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store i8 %res1, ptr %this, align 1, !tbaa !6
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%b = getelementptr inbounds %S, ptr %rhs, i64 0, i32 1
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%right2 = load i8, ptr %b, align 1, !tbaa !13, !range !11, !noundef !12
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%b8 = getelementptr inbounds %S, ptr %this, i64 0, i32 1
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%left2 = load i8, ptr %b8, align 1, !tbaa !13, !range !11, !noundef !12
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%res2 = or i8 %right2, %left2
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store i8 %res2, ptr %b8, align 1, !tbaa !13
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%c = getelementptr inbounds %S, ptr %rhs, i64 0, i32 2
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%right3 = load i8, ptr %c, align 1, !tbaa !14, !range !11, !noundef !12
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%c16 = getelementptr inbounds %S, ptr %this, i64 0, i32 2
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%left3 = load i8, ptr %c16, align 1, !tbaa !14, !range !11, !noundef !12
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%res3 = or i8 %right3, %left3
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store i8 %res3, ptr %c16, align 1, !tbaa !14
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%d = getelementptr inbounds %S, ptr %rhs, i64 0, i32 3
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%right4 = load i8, ptr %d, align 1, !tbaa !15, !range !11, !noundef !12
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%d24 = getelementptr inbounds %S, ptr %this, i64 0, i32 3
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%left4 = load i8, ptr %d24, align 1, !tbaa !15, !range !11, !noundef !12
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%res4 = or i8 %right4, %left4
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store i8 %res4, ptr %d24, align 1, !tbaa !15
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ret ptr %this
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}
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!6 = !{!7, !8, i64 0}
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!7 = !{!"S", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
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!8 = !{!"bool", !9, i64 0}
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!9 = !{!"omnipotent char", !10, i64 0}
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!10 = !{!"Simple C++ TBAA"}
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!11 = !{i8 0, i8 2}
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!12 = !{}
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!13 = !{!7, !8, i64 1}
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!14 = !{!7, !8, i64 2}
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!15 = !{!7, !8, i64 3}
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