eecb99c5f6
These tests rely on SCEV looking recognizing an "or" with no common bits as an "add". Add the disjoint flag to relevant or instructions in preparation for switching SCEV to use the flag instead of the ValueTracking query. The IR with disjoint flag matches what InstCombine would produce.
67 lines
2.8 KiB
LLVM
67 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
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target triple = "i386-apple-macosx10.9.0"
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;int foo(int *A, int n, int k) {
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; for (int i=0; i < 10000; i+=4) {
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; A[i] += n;
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; A[i+1] += k;
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; A[i+2] += n;
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; A[i+3] += k;
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; }
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;}
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define i32 @foo(ptr nocapture %A, i32 %n, i32 %k) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[K:%.*]], i32 1
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[I_024:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD10:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[I_024]]
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; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP2]]
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; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[ADD10]] = add nsw i32 [[I_024]], 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD10]], 10000
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.end:
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; CHECK-NEXT: ret i32 undef
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;
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.024 = phi i32 [ 0, %entry ], [ %add10, %for.body ]
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%arrayidx = getelementptr inbounds i32, ptr %A, i32 %i.024
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%0 = load i32, ptr %arrayidx, align 4
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%add = add nsw i32 %0, %n
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store i32 %add, ptr %arrayidx, align 4
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%add121 = or disjoint i32 %i.024, 1
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%arrayidx2 = getelementptr inbounds i32, ptr %A, i32 %add121
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%1 = load i32, ptr %arrayidx2, align 4
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%add3 = add nsw i32 %1, %k
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store i32 %add3, ptr %arrayidx2, align 4
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%add422 = or disjoint i32 %i.024, 2
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%arrayidx5 = getelementptr inbounds i32, ptr %A, i32 %add422
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%2 = load i32, ptr %arrayidx5, align 4
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%add6 = add nsw i32 %2, %n
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store i32 %add6, ptr %arrayidx5, align 4
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%add723 = or disjoint i32 %i.024, 3
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%arrayidx8 = getelementptr inbounds i32, ptr %A, i32 %add723
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%3 = load i32, ptr %arrayidx8, align 4
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%add9 = add nsw i32 %3, %k
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store i32 %add9, ptr %arrayidx8, align 4
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%add10 = add nsw i32 %i.024, 4
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%cmp = icmp slt i32 %add10, 10000
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.body
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ret i32 undef
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}
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