eecb99c5f6
These tests rely on SCEV looking recognizing an "or" with no common bits as an "add". Add the disjoint flag to relevant or instructions in preparation for switching SCEV to use the flag instead of the ValueTracking query. The IR with disjoint flag matches what InstCombine would produce.
81 lines
4.0 KiB
LLVM
81 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.7.0"
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@.str = private unnamed_addr constant [6 x i8] c"bingo\00", align 1
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; Uses inside the tree must be scheduled after the corresponding tree bundle.
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define void @in_tree_user(ptr nocapture %A, i32 %n) {
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; CHECK-LABEL: @in_tree_user(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[N:%.*]] to double
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP2]]
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; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP4]], <double 7.000000e+00, double 4.000000e+00>
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> [[TMP5]], <double 5.000000e+00, double 9.000000e+00>
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[TMP6]], i32 0
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; CHECK-NEXT: [[INTREEUSER:%.*]] = fadd double [[TMP7]], [[TMP7]]
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; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP6]], i32 1
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; CHECK-NEXT: [[CMP11:%.*]] = fcmp ogt double [[TMP7]], [[TMP8]]
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; CHECK-NEXT: br i1 [[CMP11]], label [[IF_THEN:%.*]], label [[FOR_INC]]
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; CHECK: if.then:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (ptr, ...) @printf(ptr @.str)
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; CHECK-NEXT: br label [[FOR_INC]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], 100
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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; CHECK: for.end:
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; CHECK-NEXT: store double [[INTREEUSER]], ptr [[A]], align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%conv = sitofp i32 %n to double
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br label %for.body
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for.body: ; preds = %for.inc, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
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%0 = shl nsw i64 %indvars.iv, 1
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%arrayidx = getelementptr inbounds double, ptr %A, i64 %0
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%1 = load double, ptr %arrayidx, align 8
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%mul1 = fmul double %conv, %1
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%mul2 = fmul double %mul1, 7.000000e+00
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%add = fadd double %mul2, 5.000000e+00
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%InTreeUser = fadd double %add, %add ; <------------------ In tree user.
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%2 = or disjoint i64 %0, 1
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%arrayidx6 = getelementptr inbounds double, ptr %A, i64 %2
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%3 = load double, ptr %arrayidx6, align 8
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%mul8 = fmul double %conv, %3
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%mul9 = fmul double %mul8, 4.000000e+00
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%add10 = fadd double %mul9, 9.000000e+00
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%cmp11 = fcmp ogt double %add, %add10
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br i1 %cmp11, label %if.then, label %for.inc
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if.then: ; preds = %for.body
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%call = tail call i32 (ptr, ...) @printf(ptr @.str)
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br label %for.inc
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for.inc: ; preds = %for.body, %if.then
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 100
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.inc
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store double %InTreeUser, ptr %A, align 8 ; Avoid dead code elimination of the InTreeUser.
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ret void
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}
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declare i32 @printf(ptr nocapture, ...)
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