Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
30 lines
860 B
YAML
30 lines
860 B
YAML
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# REQUIRES: x86-registered-target
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# Ensure llc can read and parse MIR pseudo probe operations.
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# RUN: llc -O0 -mtriple x86_64-- -run-pass none %s -o - | FileCheck %s
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# CHECK: PSEUDO_PROBE 6699318081062747564, 1, 0, 0
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# CHECK: PSEUDO_PROBE 6699318081062747564, 3, 0, 0
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# CHECK: PSEUDO_PROBE 6699318081062747564, 4, 0, 0
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# CHECK: PSEUDO_PROBE 6699318081062747564, 2, 0, 0
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# CHECK: PSEUDO_PROBE 6699318081062747564, 4, 0, 0
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name: foo
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body: |
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bb.0:
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TEST32rr killed renamable $edi, renamable $edi, implicit-def $eflags
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PSEUDO_PROBE 6699318081062747564, 1, 0, 0
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JCC_1 %bb.1, 4, implicit $eflags
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bb.2:
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PSEUDO_PROBE 6699318081062747564, 3, 0, 0
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PSEUDO_PROBE 6699318081062747564, 4, 0, 0
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RET64
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bb.1:
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PSEUDO_PROBE 6699318081062747564, 2, 0, 0
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PSEUDO_PROBE 6699318081062747564, 4, 0, 0
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RET64
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...
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