d36d805373
Similar to #84187, this enables the existing test we have for checking the scheduling info of the pseudos matches the real instructions, and adjusts the scheduling info in the NeoverseN2 model to make sure all cases were handled.
123 lines
4.1 KiB
C++
123 lines
4.1 KiB
C++
#include "AArch64InstrInfo.h"
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#include "AArch64Subtarget.h"
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#include "AArch64TargetMachine.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "gtest/gtest.h"
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#define GET_COMPUTE_FEATURES
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#include "AArch64GenInstrInfo.inc"
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using namespace llvm;
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namespace {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine(const std::string &CPU) {
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auto TT(Triple::normalize("aarch64--"));
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LLVMInitializeAArch64TargetInfo();
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LLVMInitializeAArch64Target();
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LLVMInitializeAArch64TargetMC();
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std::string Error;
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const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
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TheTarget->createTargetMachine(TT, CPU, "", TargetOptions(), std::nullopt,
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std::nullopt, CodeGenOptLevel::Default)));
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}
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std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
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AArch64Subtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
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std::string(TM->getTargetCPU()),
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std::string(TM->getTargetFeatureString()), *TM, true);
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return std::make_unique<AArch64InstrInfo>(ST);
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}
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/// Returns true if the instruction is enabled under a feature that the
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/// CPU supports.
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static bool isInstructionSupportedByCPU(unsigned Opcode,
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FeatureBitset Features) {
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FeatureBitset AvailableFeatures =
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llvm::AArch64_MC::computeAvailableFeatures(Features);
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FeatureBitset RequiredFeatures =
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llvm::AArch64_MC::computeRequiredFeatures(Opcode);
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FeatureBitset MissingFeatures =
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(AvailableFeatures & RequiredFeatures) ^ RequiredFeatures;
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return MissingFeatures.none();
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}
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void runSVEPseudoTestForCPU(const std::string &CPU) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine(CPU);
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ASSERT_TRUE(TM);
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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ASSERT_TRUE(II);
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const MCSubtargetInfo *STI = TM->getMCSubtargetInfo();
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MCSchedModel SchedModel = STI->getSchedModel();
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for (unsigned i = 0; i < AArch64::INSTRUCTION_LIST_END; ++i) {
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// Check if instruction is in the pseudo table
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// i holds the opcode of the pseudo, OrigInstr holds the opcode of the
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// original instruction
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int OrigInstr = AArch64::getSVEPseudoMap(i);
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if (OrigInstr == -1)
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continue;
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// Ignore any pseudos/instructions which may not be part of the scheduler
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// model for the CPU we're testing. This avoids this test from failing when
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// new instructions are added that are not yet covered by the scheduler
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// model.
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if (!isInstructionSupportedByCPU(OrigInstr, STI->getFeatureBits()))
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continue;
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const MCInstrDesc &Desc = II->get(i);
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unsigned SCClass = Desc.getSchedClass();
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const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SCClass);
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const MCInstrDesc &DescOrig = II->get(OrigInstr);
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unsigned SCClassOrig = DescOrig.getSchedClass();
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const MCSchedClassDesc *SCDescOrig =
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SchedModel.getSchedClassDesc(SCClassOrig);
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int Latency = 0;
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int LatencyOrig = 0;
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for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries;
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DefIdx != DefEnd; ++DefIdx) {
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const MCWriteLatencyEntry *WLEntry =
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STI->getWriteLatencyEntry(SCDesc, DefIdx);
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const MCWriteLatencyEntry *WLEntryOrig =
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STI->getWriteLatencyEntry(SCDescOrig, DefIdx);
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Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles));
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LatencyOrig = std::max(Latency, static_cast<int>(WLEntryOrig->Cycles));
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}
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ASSERT_EQ(Latency, LatencyOrig);
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ASSERT_TRUE(SCDesc->isValid());
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}
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}
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// TODO : Add more CPUs that support SVE/SVE2
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TEST(AArch64SVESchedPseudoTesta510, IsCorrect) {
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runSVEPseudoTestForCPU("cortex-a510");
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}
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TEST(AArch64SVESchedPseudoTestn1, IsCorrect) {
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runSVEPseudoTestForCPU("neoverse-n2");
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}
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TEST(AArch64SVESchedPseudoTestv1, IsCorrect) {
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runSVEPseudoTestForCPU("neoverse-v1");
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}
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TEST(AArch64SVESchedPseudoTestv2, IsCorrect) {
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runSVEPseudoTestForCPU("neoverse-v2");
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}
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} // namespace
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