fa3d789df1
Refactor of the llvm-tblgen source into: - a "Basic" library, which contains the bare minimum utilities to build `llvm-min-tablegen` - a "Common" library which contains all of the helpers for TableGen backends. Such helpers can be shared by more than one backend, and even unit tested (e.g. CodeExpander is, maybe we can add more over time) Fixes #80647
92 lines
3.3 KiB
C++
92 lines
3.3 KiB
C++
//==- X86MnemonicTables.cpp - Generate mnemonic extraction tables. -*- C++ -*-//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting tables that group
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// instructions by their mnemonic name wrt AsmWriter Variant (e.g. isADD, etc).
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//
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//===----------------------------------------------------------------------===//
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#include "Common/CodeGenInstruction.h"
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#include "Common/CodeGenTarget.h"
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#include "X86RecognizableInstr.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/TableGenBackend.h"
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using namespace llvm;
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namespace {
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class X86MnemonicTablesEmitter {
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CodeGenTarget Target;
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public:
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X86MnemonicTablesEmitter(RecordKeeper &R) : Target(R) {}
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// Output X86 mnemonic tables.
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void run(raw_ostream &OS);
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};
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void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
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emitSourceFileHeader("X86 Mnemonic tables", OS);
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OS << "namespace llvm {\nnamespace X86 {\n\n";
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Record *AsmWriter = Target.getAsmWriter();
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unsigned Variant = AsmWriter->getValueAsInt("Variant");
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// Hold all instructions grouped by mnemonic
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StringMap<SmallVector<const CodeGenInstruction *, 0>> MnemonicToCGInstrMap;
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ArrayRef<const CodeGenInstruction *> NumberedInstructions =
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Target.getInstructionsByEnumValue();
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for (const CodeGenInstruction *I : NumberedInstructions) {
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const Record *Def = I->TheDef;
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// Filter non-X86 instructions.
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if (!Def->isSubClassOf("X86Inst"))
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continue;
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X86Disassembler::RecognizableInstrBase RI(*I);
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if (!RI.shouldBeEmitted())
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continue;
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if ( // Non-parsable instruction defs contain prefix as part of AsmString
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Def->getValueAsString("AsmVariantName") == "NonParsable" ||
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// Skip prefix byte
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RI.Form == X86Local::PrefixByte)
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continue;
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std::string Mnemonic = X86Disassembler::getMnemonic(I, Variant);
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MnemonicToCGInstrMap[Mnemonic].push_back(I);
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}
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OS << "#ifdef GET_X86_MNEMONIC_TABLES_H\n";
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OS << "#undef GET_X86_MNEMONIC_TABLES_H\n\n";
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for (StringRef Mnemonic : MnemonicToCGInstrMap.keys())
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OS << "bool is" << Mnemonic << "(unsigned Opcode);\n";
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OS << "#endif // GET_X86_MNEMONIC_TABLES_H\n\n";
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OS << "#ifdef GET_X86_MNEMONIC_TABLES_CPP\n";
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OS << "#undef GET_X86_MNEMONIC_TABLES_CPP\n\n";
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for (StringRef Mnemonic : MnemonicToCGInstrMap.keys()) {
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OS << "bool is" << Mnemonic << "(unsigned Opcode) {\n";
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auto Mnemonics = MnemonicToCGInstrMap[Mnemonic];
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if (Mnemonics.size() == 1) {
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const CodeGenInstruction *CGI = *Mnemonics.begin();
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OS << "\treturn Opcode == " << CGI->TheDef->getName() << ";\n}\n\n";
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} else {
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OS << "\tswitch (Opcode) {\n";
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for (const CodeGenInstruction *CGI : Mnemonics) {
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OS << "\tcase " << CGI->TheDef->getName() << ":\n";
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}
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OS << "\t\treturn true;\n\t}\n\treturn false;\n}\n\n";
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}
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}
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OS << "#endif // GET_X86_MNEMONIC_TABLES_CPP\n\n";
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OS << "} // end namespace X86\n} // end namespace llvm";
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}
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} // namespace
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static TableGen::Emitter::OptClass<X86MnemonicTablesEmitter>
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X("gen-x86-mnemonic-tables", "Generate X86 mnemonic tables");
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