c63febb102
see #73359 Declarative assemblyFormat ODS is more concise and requires less boilerplate than filling out CPP interfaces. Changes: * updates the Ops defined in `SPIRVAtomicOps.td` to use assemblyFormat. * Removes print/parse from`AtomcOps.cpp` which is now generated by assemblyFormat * Adds `Trait` to verify that a pointer operand `foo`'s pointee type matches operand `bar`'s type * * Updates error message expected in tests from new Trait * Updates tests to updated format (largely using <operand> in place of "operand")
77 lines
4.2 KiB
MLIR
77 lines
4.2 KiB
MLIR
// RUN: mlir-opt -split-input-file -convert-memref-to-spirv %s -o - | FileCheck %s
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module attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.3, [Shader], []>, #spirv.resource_limits<>>} {
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// CHECK: func.func @atomic_addi_storage_buffer
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_addi_storage_buffer(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicIAdd <Device> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, StorageBuffer>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "addi" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_maxs_workgroup
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_maxs_workgroup(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<Workgroup>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicSMax <Workgroup> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, Workgroup>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "maxs" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<Workgroup>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_maxu_storage_buffer
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_maxu_storage_buffer(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicUMax <Device> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, StorageBuffer>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "maxu" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_mins_workgroup
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_mins_workgroup(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<Workgroup>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicSMin <Workgroup> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, Workgroup>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "mins" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<Workgroup>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_minu_storage_buffer
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_minu_storage_buffer(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicUMin <Device> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, StorageBuffer>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "minu" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_ori_workgroup
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_ori_workgroup(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<Workgroup>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicOr <Workgroup> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, Workgroup>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "ori" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<Workgroup>>) -> i32
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return %0: i32
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}
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// CHECK: func.func @atomic_andi_storage_buffer
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// CHECK-SAME: (%[[VAL:.+]]: i32,
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func.func @atomic_andi_storage_buffer(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>, %i0: index, %i1: index, %i2: index) -> i32 {
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// CHECK: %[[AC:.+]] = spirv.AccessChain
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// CHECK: %[[ATOMIC:.+]] = spirv.AtomicAnd <Device> <AcquireRelease> %[[AC]], %[[VAL]] : !spirv.ptr<i32, StorageBuffer>
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// CHECK: return %[[ATOMIC]]
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%0 = memref.atomic_rmw "andi" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<StorageBuffer>>) -> i32
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return %0: i32
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}
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}
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