5f230ed762
Change the LLVM dialect to LLVM IR translation to convert the alias scope attributes lazily to LLVM IR metadata. Previously, the alias scopes have been translated upfront walking the alias scopes of operations that implement the AliasAnalysisOpInterface. As a result, the translation of a module that contains only a noalias scope intrinsic failed, since its alias scope attribute has not been translated due to the intrinsic not implementing AliasAnalysisOpInterface. Reviewed By: zero9178 Differential Revision: https://reviews.llvm.org/D159187
89 lines
5.3 KiB
MLIR
89 lines
5.3 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s
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#tbaa_root_0 = #llvm.tbaa_root<id = "Simple C/C++ TBAA">
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#tbaa_type_desc_1 = #llvm.tbaa_type_desc<id = "omnipotent char", members = {<#tbaa_root_0, 0>}>
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#tbaa_type_desc_2 = #llvm.tbaa_type_desc<id = "long long", members = {<#tbaa_type_desc_1, 0>}>
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#tbaa_type_desc_3 = #llvm.tbaa_type_desc<id = "agg2_t", members = {<#tbaa_type_desc_2, 0>, <#tbaa_type_desc_2, 8>}>
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#tbaa_tag_4 = #llvm.tbaa_tag<access_type = #tbaa_type_desc_2, base_type = #tbaa_type_desc_3, offset = 8>
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#tbaa_type_desc_5 = #llvm.tbaa_type_desc<id = "int", members = {<#tbaa_type_desc_1, 0>}>
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#tbaa_type_desc_6 = #llvm.tbaa_type_desc<id = "agg1_t", members = {<#tbaa_type_desc_5, 0>, <#tbaa_type_desc_5, 4>}>
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#tbaa_tag_7 = #llvm.tbaa_tag<access_type = #tbaa_type_desc_5, base_type = #tbaa_type_desc_6, offset = 0, constant = true>
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llvm.func @tbaa2(%arg0: !llvm.ptr, %arg1: !llvm.ptr) {
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%0 = llvm.mlir.constant(0 : i32) : i32
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%1 = llvm.mlir.constant(1 : i32) : i32
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%2 = llvm.getelementptr inbounds %arg1[%0, 1] : (!llvm.ptr, i32) -> !llvm.ptr, !llvm.struct<"struct.agg2_t", (i64, i64)>
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// CHECK: load i64, ptr %{{.*}},{{.*}}!tbaa ![[LTAG:[0-9]*]]
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%3 = llvm.load %2 {tbaa = [#tbaa_tag_4]} : !llvm.ptr -> i64
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%4 = llvm.trunc %3 : i64 to i32
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%5 = llvm.getelementptr inbounds %arg0[%0, 0] : (!llvm.ptr, i32) -> !llvm.ptr, !llvm.struct<"struct.agg1_t", (i32, i32)>
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// CHECK: store i32 %{{.*}}, ptr %{{.*}},{{.*}}!tbaa ![[STAG:[0-9]*]]
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llvm.store %4, %5 {tbaa = [#tbaa_tag_7]} : i32, !llvm.ptr
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llvm.return
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}
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// CHECK-DAG: ![[LTAG]] = !{![[AGG2T:[0-9]*]], ![[I64T:[0-9]*]], i64 8}
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// CHECK-DAG: ![[AGG2T]] = !{!"agg2_t", ![[I64T]], i64 0, ![[I64T]], i64 8}
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// CHECK-DAG: ![[I64T]] = !{!"long long", ![[CHART:[0-9]*]], i64 0}
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// CHECK-DAG: ![[CHART]] = !{!"omnipotent char", ![[ROOT:[0-9]*]], i64 0}
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// CHECK-DAG: ![[ROOT]] = !{!"Simple C/C++ TBAA"}
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// CHECK-DAG: ![[STAG]] = !{![[AGG1T:[0-9]*]], ![[I32T:[0-9]*]], i64 0, i64 1}
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// CHECK-DAG: ![[AGG1T]] = !{!"agg1_t", ![[I32T]], i64 0, ![[I32T]], i64 4}
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// CHECK-DAG: ![[I32T]] = !{!"int", ![[CHART]], i64 0}
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// -----
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// Verify that the MDNode's created for the access tags are not uniqued
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// before they are finalized. In the process of creating the MDNodes for
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// the tag operations we used to produce incomplete MDNodes like:
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// #tbaa_tag_4 => !{!null, !null, i64 0}
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// #tbaa_tag_7 => !{!null, !null, i64 0}
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// This caused the two tags to map to the same incomplete MDNode due to
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// uniquing. To prevent this, we have to use temporary MDNodes
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// instead of !null's.
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#tbaa_root_0 = #llvm.tbaa_root<id = "Simple C/C++ TBAA">
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#tbaa_type_desc_1 = #llvm.tbaa_type_desc<id = "omnipotent char", members = {<#tbaa_root_0, 0>}>
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#tbaa_type_desc_2 = #llvm.tbaa_type_desc<id = "float", members = {<#tbaa_type_desc_1, 0>}>
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#tbaa_type_desc_3 = #llvm.tbaa_type_desc<id = "agg2_t", members = {<#tbaa_type_desc_2, 0>, <#tbaa_type_desc_2, 4>}>
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#tbaa_tag_4 = #llvm.tbaa_tag<access_type = #tbaa_type_desc_2, base_type = #tbaa_type_desc_3, offset = 0>
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#tbaa_type_desc_5 = #llvm.tbaa_type_desc<id = "int", members = {<#tbaa_type_desc_1, 0>}>
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#tbaa_type_desc_6 = #llvm.tbaa_type_desc<id = "agg1_t", members = {<#tbaa_type_desc_5, 0>, <#tbaa_type_desc_5, 4>}>
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#tbaa_tag_7 = #llvm.tbaa_tag<access_type = #tbaa_type_desc_5, base_type = #tbaa_type_desc_6, offset = 0>
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llvm.func @foo(%arg0: !llvm.ptr)
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llvm.func @tbaa2(%arg0: !llvm.ptr, %arg1: !llvm.ptr) {
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%0 = llvm.mlir.constant(0 : i32) : i32
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%1 = llvm.mlir.constant(1 : i32) : i32
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%2 = llvm.getelementptr inbounds %arg1[%0, 0] : (!llvm.ptr, i32) -> !llvm.ptr, !llvm.struct<"struct.agg2_t", (f32, f32)>
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// CHECK: load float, ptr %{{.*}},{{.*}}!tbaa ![[LTAG:[0-9]*]]
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%3 = llvm.load %2 {tbaa = [#tbaa_tag_4]} : !llvm.ptr -> f32
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%4 = llvm.fptosi %3 : f32 to i32
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%5 = llvm.getelementptr inbounds %arg0[%0, 0] : (!llvm.ptr, i32) -> !llvm.ptr, !llvm.struct<"struct.agg1_t", (i32, i32)>
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// CHECK: store i32 %{{.*}}, ptr %{{.*}},{{.*}}!tbaa ![[STAG:[0-9]*]]
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llvm.store %4, %5 {tbaa = [#tbaa_tag_7]} : i32, !llvm.ptr
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// CHECK: atomicrmw add ptr %{{.*}}, i32 %{{.*}} !tbaa ![[STAG]]
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%6 = llvm.atomicrmw add %5, %4 monotonic {tbaa = [#tbaa_tag_7]} : !llvm.ptr, i32
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// CHECK: cmpxchg ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}} !tbaa ![[STAG]]
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%7 = llvm.cmpxchg %5, %6, %4 acq_rel monotonic {tbaa = [#tbaa_tag_7]} : !llvm.ptr, i32
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%9 = llvm.mlir.constant(42 : i8) : i8
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// CHECK: llvm.memcpy{{.*}} !tbaa ![[STAG]]
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"llvm.intr.memcpy"(%arg1, %arg1, %0) <{isVolatile = false}> {tbaa = [#tbaa_tag_7]} : (!llvm.ptr, !llvm.ptr, i32) -> ()
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// CHECK: llvm.memset{{.*}} !tbaa ![[STAG]]
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"llvm.intr.memset"(%arg1, %9, %0) <{isVolatile = false}> {tbaa = [#tbaa_tag_7]} : (!llvm.ptr, i8, i32) -> ()
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// CHECK: call void @foo({{.*}} !tbaa ![[STAG]]
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llvm.call @foo(%arg1) {tbaa = [#tbaa_tag_7]} : (!llvm.ptr) -> ()
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llvm.return
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}
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// CHECK-DAG: ![[LTAG]] = !{![[AGG2T:[0-9]*]], ![[F32T:[0-9]*]], i64 0}
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// CHECK-DAG: ![[AGG2T]] = !{!"agg2_t", ![[F32T]], i64 0, ![[F32T]], i64 4}
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// CHECK-DAG: ![[I64T]] = !{!"float", ![[CHART:[0-9]*]], i64 0}
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// CHECK-DAG: ![[CHART]] = !{!"omnipotent char", ![[ROOT:[0-9]*]], i64 0}
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// CHECK-DAG: ![[ROOT]] = !{!"Simple C/C++ TBAA"}
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// CHECK-DAG: ![[STAG]] = !{![[AGG1T:[0-9]*]], ![[I32T:[0-9]*]], i64 0}
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// CHECK-DAG: ![[AGG1T]] = !{!"agg1_t", ![[I32T]], i64 0, ![[I32T]], i64 4}
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// CHECK-DAG: ![[I32T]] = !{!"int", ![[CHART]], i64 0}
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